| 123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186 | /* * arch/arm/mach-at91/at91rm9200.c * *  Copyright (C) 2005 SAN People * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * */#include <linux/module.h>#include <asm/irq.h>#include <asm/mach/arch.h>#include <asm/mach/map.h>#include <asm/system_misc.h>#include <mach/at91rm9200.h>#include <mach/at91_pmc.h>#include <mach/at91_st.h>#include <mach/cpu.h>#include "at91_aic.h"#include "soc.h"#include "generic.h"#include "clock.h"#include "sam9_smc.h"/* -------------------------------------------------------------------- *  Clocks * -------------------------------------------------------------------- *//* * The peripheral clocks. */static struct clk udc_clk = {	.name		= "udc_clk",	.pmc_mask	= 1 << AT91RM9200_ID_UDP,	.type		= CLK_TYPE_PERIPHERAL,};static struct clk ohci_clk = {	.name		= "ohci_clk",	.pmc_mask	= 1 << AT91RM9200_ID_UHP,	.type		= CLK_TYPE_PERIPHERAL,};static struct clk ether_clk = {	.name		= "ether_clk",	.pmc_mask	= 1 << AT91RM9200_ID_EMAC,	.type		= CLK_TYPE_PERIPHERAL,};static struct clk mmc_clk = {	.name		= "mci_clk",	.pmc_mask	= 1 << AT91RM9200_ID_MCI,	.type		= CLK_TYPE_PERIPHERAL,};static struct clk twi_clk = {	.name		= "twi_clk",	.pmc_mask	= 1 << AT91RM9200_ID_TWI,	.type		= CLK_TYPE_PERIPHERAL,};static struct clk usart0_clk = {	.name		= "usart0_clk",	.pmc_mask	= 1 << AT91RM9200_ID_US0,	.type		= CLK_TYPE_PERIPHERAL,};static struct clk usart1_clk = {	.name		= "usart1_clk",	.pmc_mask	= 1 << AT91RM9200_ID_US1,	.type		= CLK_TYPE_PERIPHERAL,};static struct clk usart2_clk = {	.name		= "usart2_clk",	.pmc_mask	= 1 << AT91RM9200_ID_US2,	.type		= CLK_TYPE_PERIPHERAL,};static struct clk usart3_clk = {	.name		= "usart3_clk",	.pmc_mask	= 1 << AT91RM9200_ID_US3,	.type		= CLK_TYPE_PERIPHERAL,};static struct clk spi_clk = {	.name		= "spi_clk",	.pmc_mask	= 1 << AT91RM9200_ID_SPI,	.type		= CLK_TYPE_PERIPHERAL,};static struct clk pioA_clk = {	.name		= "pioA_clk",	.pmc_mask	= 1 << AT91RM9200_ID_PIOA,	.type		= CLK_TYPE_PERIPHERAL,};static struct clk pioB_clk = {	.name		= "pioB_clk",	.pmc_mask	= 1 << AT91RM9200_ID_PIOB,	.type		= CLK_TYPE_PERIPHERAL,};static struct clk pioC_clk = {	.name		= "pioC_clk",	.pmc_mask	= 1 << AT91RM9200_ID_PIOC,	.type		= CLK_TYPE_PERIPHERAL,};static struct clk pioD_clk = {	.name		= "pioD_clk",	.pmc_mask	= 1 << AT91RM9200_ID_PIOD,	.type		= CLK_TYPE_PERIPHERAL,};static struct clk ssc0_clk = {	.name		= "ssc0_clk",	.pmc_mask	= 1 << AT91RM9200_ID_SSC0,	.type		= CLK_TYPE_PERIPHERAL,};static struct clk ssc1_clk = {	.name		= "ssc1_clk",	.pmc_mask	= 1 << AT91RM9200_ID_SSC1,	.type		= CLK_TYPE_PERIPHERAL,};static struct clk ssc2_clk = {	.name		= "ssc2_clk",	.pmc_mask	= 1 << AT91RM9200_ID_SSC2,	.type		= CLK_TYPE_PERIPHERAL,};static struct clk tc0_clk = {	.name		= "tc0_clk",	.pmc_mask	= 1 << AT91RM9200_ID_TC0,	.type		= CLK_TYPE_PERIPHERAL,};static struct clk tc1_clk = {	.name		= "tc1_clk",	.pmc_mask	= 1 << AT91RM9200_ID_TC1,	.type		= CLK_TYPE_PERIPHERAL,};static struct clk tc2_clk = {	.name		= "tc2_clk",	.pmc_mask	= 1 << AT91RM9200_ID_TC2,	.type		= CLK_TYPE_PERIPHERAL,};static struct clk tc3_clk = {	.name		= "tc3_clk",	.pmc_mask	= 1 << AT91RM9200_ID_TC3,	.type		= CLK_TYPE_PERIPHERAL,};static struct clk tc4_clk = {	.name		= "tc4_clk",	.pmc_mask	= 1 << AT91RM9200_ID_TC4,	.type		= CLK_TYPE_PERIPHERAL,};static struct clk tc5_clk = {	.name		= "tc5_clk",	.pmc_mask	= 1 << AT91RM9200_ID_TC5,	.type		= CLK_TYPE_PERIPHERAL,};static struct clk *periph_clocks[] __initdata = {	&pioA_clk,	&pioB_clk,	&pioC_clk,	&pioD_clk,	&usart0_clk,	&usart1_clk,	&usart2_clk,	&usart3_clk,	&mmc_clk,	&udc_clk,	&twi_clk,	&spi_clk,	&ssc0_clk,	&ssc1_clk,	&ssc2_clk,	&tc0_clk,	&tc1_clk,	&tc2_clk,	&tc3_clk,	&tc4_clk,	&tc5_clk,	&ohci_clk,	ðer_clk,	// irq0 .. irq6};static struct clk_lookup periph_clocks_lookups[] = {	CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tc0_clk),	CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.0", &tc1_clk),	CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc2_clk),	CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.1", &tc3_clk),	CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.1", &tc4_clk),	CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.1", &tc5_clk),
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