| 1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192 | #ifndef __ALPHA_TITAN__H__#define __ALPHA_TITAN__H__#include <linux/types.h>#include <asm/compiler.h>/* * TITAN is the internal names for a core logic chipset which provides * memory controller and PCI/AGP access for 21264 based systems. * * This file is based on: * * Titan Chipset Engineering Specification * Revision 0.12 * 13 July 1999 * *//* XXX: Do we need to conditionalize on this?  */#ifdef USE_48_BIT_KSEG#define TI_BIAS 0x80000000000UL#else#define TI_BIAS 0x10000000000UL#endif/* * CChip, DChip, and PChip registers */typedef struct {	volatile unsigned long csr __attribute__((aligned(64)));} titan_64;typedef struct {	titan_64	csc;	titan_64	mtr;	titan_64	misc;	titan_64	mpd;	titan_64	aar0;	titan_64	aar1;	titan_64	aar2;	titan_64	aar3;	titan_64	dim0;	titan_64	dim1;	titan_64	dir0;	titan_64	dir1;	titan_64	drir;	titan_64	prben;	titan_64	iic0;	titan_64	iic1;	titan_64	mpr0;	titan_64	mpr1;	titan_64	mpr2;	titan_64	mpr3;	titan_64	rsvd[2];	titan_64	ttr;	titan_64	tdr;	titan_64	dim2;	titan_64	dim3;	titan_64	dir2;	titan_64	dir3;	titan_64	iic2;	titan_64	iic3;	titan_64	pwr;	titan_64	reserved[17];	titan_64	cmonctla;	titan_64	cmonctlb;	titan_64	cmoncnt01;	titan_64	cmoncnt23;	titan_64	cpen;} titan_cchip;typedef struct {	titan_64	dsc;	titan_64	str;	titan_64	drev;	titan_64	dsc2;} titan_dchip;typedef struct {	titan_64	wsba[4];	titan_64	wsm[4];	titan_64	tba[4];	titan_64	pctl;	titan_64	plat;	titan_64	reserved0[2];	union {		struct {			titan_64	serror;			titan_64	serren;			titan_64	serrset;			titan_64	reserved0;
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