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							- /*
 
-  * Copyright (c) 2010-2012 Samsung Electronics Co., Ltd.
 
-  *		http://www.samsung.com
 
-  *
 
-  * EXYNOS - IRQ definitions
 
-  *
 
-  * This program is free software; you can redistribute it and/or modify
 
-  * it under the terms of the GNU General Public License version 2 as
 
-  * published by the Free Software Foundation.
 
- */
 
- #ifndef __ASM_ARCH_IRQS_H
 
- #define __ASM_ARCH_IRQS_H __FILE__
 
- #include <plat/irqs.h>
 
- /* PPI: Private Peripheral Interrupt */
 
- #define IRQ_PPI(x)			(x + 16)
 
- /* SPI: Shared Peripheral Interrupt */
 
- #define IRQ_SPI(x)			(x + 32)
 
- /* COMBINER */
 
- #define MAX_IRQ_IN_COMBINER		8
 
- #define COMBINER_GROUP(x)		((x) * MAX_IRQ_IN_COMBINER + IRQ_SPI(128))
 
- #define COMBINER_IRQ(x, y)		(COMBINER_GROUP(x) + y)
 
- /* For EXYNOS4 and EXYNOS5 */
 
- #define EXYNOS_IRQ_MCT_LOCALTIMER	IRQ_PPI(12)
 
- #define EXYNOS_IRQ_EINT16_31		IRQ_SPI(32)
 
- /* For EXYNOS4 SoCs */
 
- #define EXYNOS4_IRQ_EINT0		IRQ_SPI(16)
 
- #define EXYNOS4_IRQ_EINT1		IRQ_SPI(17)
 
- #define EXYNOS4_IRQ_EINT2		IRQ_SPI(18)
 
- #define EXYNOS4_IRQ_EINT3		IRQ_SPI(19)
 
- #define EXYNOS4_IRQ_EINT4		IRQ_SPI(20)
 
- #define EXYNOS4_IRQ_EINT5		IRQ_SPI(21)
 
- #define EXYNOS4_IRQ_EINT6		IRQ_SPI(22)
 
- #define EXYNOS4_IRQ_EINT7		IRQ_SPI(23)
 
- #define EXYNOS4_IRQ_EINT8		IRQ_SPI(24)
 
- #define EXYNOS4_IRQ_EINT9		IRQ_SPI(25)
 
- #define EXYNOS4_IRQ_EINT10		IRQ_SPI(26)
 
- #define EXYNOS4_IRQ_EINT11		IRQ_SPI(27)
 
- #define EXYNOS4_IRQ_EINT12		IRQ_SPI(28)
 
- #define EXYNOS4_IRQ_EINT13		IRQ_SPI(29)
 
- #define EXYNOS4_IRQ_EINT14		IRQ_SPI(30)
 
- #define EXYNOS4_IRQ_EINT15		IRQ_SPI(31)
 
- #define EXYNOS4_IRQ_MDMA0		IRQ_SPI(33)
 
- #define EXYNOS4_IRQ_MDMA1		IRQ_SPI(34)
 
- #define EXYNOS4_IRQ_PDMA0		IRQ_SPI(35)
 
- #define EXYNOS4_IRQ_PDMA1		IRQ_SPI(36)
 
- #define EXYNOS4_IRQ_TIMER0_VIC		IRQ_SPI(37)
 
- #define EXYNOS4_IRQ_TIMER1_VIC		IRQ_SPI(38)
 
- #define EXYNOS4_IRQ_TIMER2_VIC		IRQ_SPI(39)
 
- #define EXYNOS4_IRQ_TIMER3_VIC		IRQ_SPI(40)
 
- #define EXYNOS4_IRQ_TIMER4_VIC		IRQ_SPI(41)
 
- #define EXYNOS4_IRQ_MCT_L0		IRQ_SPI(42)
 
- #define EXYNOS4_IRQ_WDT			IRQ_SPI(43)
 
- #define EXYNOS4_IRQ_RTC_ALARM		IRQ_SPI(44)
 
- #define EXYNOS4_IRQ_RTC_TIC		IRQ_SPI(45)
 
- #define EXYNOS4_IRQ_GPIO_XB		IRQ_SPI(46)
 
- #define EXYNOS4_IRQ_GPIO_XA		IRQ_SPI(47)
 
- #define EXYNOS4_IRQ_MCT_L1		IRQ_SPI(48)
 
- #define EXYNOS4_IRQ_UART0		IRQ_SPI(52)
 
- #define EXYNOS4_IRQ_UART1		IRQ_SPI(53)
 
- #define EXYNOS4_IRQ_UART2		IRQ_SPI(54)
 
- #define EXYNOS4_IRQ_UART3		IRQ_SPI(55)
 
- #define EXYNOS4_IRQ_UART4		IRQ_SPI(56)
 
- #define EXYNOS4_IRQ_MCT_G0		IRQ_SPI(57)
 
- #define EXYNOS4_IRQ_IIC			IRQ_SPI(58)
 
- #define EXYNOS4_IRQ_IIC1		IRQ_SPI(59)
 
- #define EXYNOS4_IRQ_IIC2		IRQ_SPI(60)
 
- #define EXYNOS4_IRQ_IIC3		IRQ_SPI(61)
 
- #define EXYNOS4_IRQ_IIC4		IRQ_SPI(62)
 
- #define EXYNOS4_IRQ_IIC5		IRQ_SPI(63)
 
- #define EXYNOS4_IRQ_IIC6		IRQ_SPI(64)
 
- #define EXYNOS4_IRQ_IIC7		IRQ_SPI(65)
 
- #define EXYNOS4_IRQ_SPI0		IRQ_SPI(66)
 
- #define EXYNOS4_IRQ_SPI1		IRQ_SPI(67)
 
- #define EXYNOS4_IRQ_SPI2		IRQ_SPI(68)
 
- #define EXYNOS4_IRQ_USB_HOST		IRQ_SPI(70)
 
- #define EXYNOS4_IRQ_USB_HSOTG		IRQ_SPI(71)
 
- #define EXYNOS4_IRQ_MODEM_IF		IRQ_SPI(72)
 
- #define EXYNOS4_IRQ_HSMMC0		IRQ_SPI(73)
 
- #define EXYNOS4_IRQ_HSMMC1		IRQ_SPI(74)
 
- #define EXYNOS4_IRQ_HSMMC2		IRQ_SPI(75)
 
- #define EXYNOS4_IRQ_HSMMC3		IRQ_SPI(76)
 
- #define EXYNOS4_IRQ_DWMCI		IRQ_SPI(77)
 
- #define EXYNOS4_IRQ_MIPI_CSIS0		IRQ_SPI(78)
 
- #define EXYNOS4_IRQ_MIPI_CSIS1		IRQ_SPI(80)
 
- #define EXYNOS4_IRQ_ONENAND_AUDI	IRQ_SPI(82)
 
- #define EXYNOS4_IRQ_ROTATOR		IRQ_SPI(83)
 
- #define EXYNOS4_IRQ_FIMC0		IRQ_SPI(84)
 
- #define EXYNOS4_IRQ_FIMC1		IRQ_SPI(85)
 
- #define EXYNOS4_IRQ_FIMC2		IRQ_SPI(86)
 
- #define EXYNOS4_IRQ_FIMC3		IRQ_SPI(87)
 
- #define EXYNOS4_IRQ_JPEG		IRQ_SPI(88)
 
- #define EXYNOS4_IRQ_2D			IRQ_SPI(89)
 
- #define EXYNOS4_IRQ_PCIE		IRQ_SPI(90)
 
- #define EXYNOS4_IRQ_MIXER		IRQ_SPI(91)
 
- #define EXYNOS4_IRQ_HDMI		IRQ_SPI(92)
 
- #define EXYNOS4_IRQ_IIC_HDMIPHY		IRQ_SPI(93)
 
- #define EXYNOS4_IRQ_MFC			IRQ_SPI(94)
 
- #define EXYNOS4_IRQ_SDO			IRQ_SPI(95)
 
- #define EXYNOS4_IRQ_AUDIO_SS		IRQ_SPI(96)
 
- #define EXYNOS4_IRQ_I2S0		IRQ_SPI(97)
 
- #define EXYNOS4_IRQ_I2S1		IRQ_SPI(98)
 
- #define EXYNOS4_IRQ_I2S2		IRQ_SPI(99)
 
- #define EXYNOS4_IRQ_AC97		IRQ_SPI(100)
 
- #define EXYNOS4_IRQ_SPDIF		IRQ_SPI(104)
 
- #define EXYNOS4_IRQ_ADC0		IRQ_SPI(105)
 
- #define EXYNOS4_IRQ_PEN0		IRQ_SPI(106)
 
- #define EXYNOS4_IRQ_ADC1		IRQ_SPI(107)
 
- #define EXYNOS4_IRQ_PEN1		IRQ_SPI(108)
 
- #define EXYNOS4_IRQ_KEYPAD		IRQ_SPI(109)
 
- #define EXYNOS4_IRQ_PMU			IRQ_SPI(110)
 
- #define EXYNOS4_IRQ_GPS			IRQ_SPI(111)
 
- #define EXYNOS4_IRQ_INTFEEDCTRL_SSS	IRQ_SPI(112)
 
- #define EXYNOS4_IRQ_SLIMBUS		IRQ_SPI(113)
 
- #define EXYNOS4_IRQ_TSI			IRQ_SPI(115)
 
- #define EXYNOS4_IRQ_SATA		IRQ_SPI(116)
 
- #define EXYNOS4_IRQ_TMU_TRIG0		COMBINER_IRQ(2, 4)
 
- #define EXYNOS4_IRQ_TMU_TRIG1		COMBINER_IRQ(3, 4)
 
- #define EXYNOS4_IRQ_SYSMMU_MDMA0_0	COMBINER_IRQ(4, 0)
 
- #define EXYNOS4_IRQ_SYSMMU_SSS_0	COMBINER_IRQ(4, 1)
 
- #define EXYNOS4_IRQ_SYSMMU_FIMC0_0	COMBINER_IRQ(4, 2)
 
- #define EXYNOS4_IRQ_SYSMMU_FIMC1_0	COMBINER_IRQ(4, 3)
 
- #define EXYNOS4_IRQ_SYSMMU_FIMC2_0	COMBINER_IRQ(4, 4)
 
- #define EXYNOS4_IRQ_SYSMMU_FIMC3_0	COMBINER_IRQ(4, 5)
 
- #define EXYNOS4_IRQ_SYSMMU_JPEG_0	COMBINER_IRQ(4, 6)
 
- #define EXYNOS4_IRQ_SYSMMU_2D_0		COMBINER_IRQ(4, 7)
 
- #define EXYNOS4_IRQ_SYSMMU_ROTATOR_0	COMBINER_IRQ(5, 0)
 
- #define EXYNOS4_IRQ_SYSMMU_MDMA1_0	COMBINER_IRQ(5, 1)
 
- #define EXYNOS4_IRQ_SYSMMU_LCD0_M0_0	COMBINER_IRQ(5, 2)
 
- #define EXYNOS4_IRQ_SYSMMU_LCD1_M1_0	COMBINER_IRQ(5, 3)
 
- #define EXYNOS4_IRQ_SYSMMU_TV_M0_0	COMBINER_IRQ(5, 4)
 
- #define EXYNOS4_IRQ_SYSMMU_MFC_M0_0	COMBINER_IRQ(5, 5)
 
- #define EXYNOS4_IRQ_SYSMMU_MFC_M1_0	COMBINER_IRQ(5, 6)
 
- #define EXYNOS4_IRQ_SYSMMU_PCIE_0	COMBINER_IRQ(5, 7)
 
- #define EXYNOS4_IRQ_SYSMMU_FIMC_LITE0_0	COMBINER_IRQ(16, 0)
 
- #define EXYNOS4_IRQ_SYSMMU_FIMC_LITE1_0	COMBINER_IRQ(16, 1)
 
- #define EXYNOS4_IRQ_SYSMMU_FIMC_ISP_0	COMBINER_IRQ(16, 2)
 
- #define EXYNOS4_IRQ_SYSMMU_FIMC_DRC_0	COMBINER_IRQ(16, 3)
 
- #define EXYNOS4_IRQ_SYSMMU_FIMC_FD_0	COMBINER_IRQ(16, 4)
 
- #define EXYNOS4_IRQ_SYSMMU_FIMC_CX_0	COMBINER_IRQ(16, 5)
 
 
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