calculationOfLiquidLevelVariance.c 2.9 KB

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  1. /*
  2. * sh7372 Power management support
  3. *
  4. * Copyright (C) 2011 Magnus Damm
  5. *
  6. * This file is subject to the terms and conditions of the GNU General Public
  7. * License. See the file "COPYING" in the main directory of this archive
  8. * for more details.
  9. */
  10. #include <linux/pm.h>
  11. #include <linux/suspend.h>
  12. #include <linux/cpuidle.h>
  13. #include <linux/module.h>
  14. #include <linux/list.h>
  15. #include <linux/err.h>
  16. #include <linux/slab.h>
  17. #include <linux/pm_clock.h>
  18. #include <linux/platform_device.h>
  19. #include <linux/delay.h>
  20. #include <linux/irq.h>
  21. #include <linux/bitrev.h>
  22. #include <linux/console.h>
  23. #include <asm/cpuidle.h>
  24. #include <asm/io.h>
  25. #include <asm/tlbflush.h>
  26. #include <asm/suspend.h>
  27. #include <mach/common.h>
  28. #include <mach/sh7372.h>
  29. #include <mach/pm-rmobile.h>
  30. /* DBG */
  31. #define DBGREG1 IOMEM(0xe6100020)
  32. #define DBGREG9 IOMEM(0xe6100040)
  33. /* CPGA */
  34. #define SYSTBCR IOMEM(0xe6150024)
  35. #define MSTPSR0 IOMEM(0xe6150030)
  36. #define MSTPSR1 IOMEM(0xe6150038)
  37. #define MSTPSR2 IOMEM(0xe6150040)
  38. #define MSTPSR3 IOMEM(0xe6150048)
  39. #define MSTPSR4 IOMEM(0xe615004c)
  40. #define PLLC01STPCR IOMEM(0xe61500c8)
  41. /* SYSC */
  42. #define SBAR IOMEM(0xe6180020)
  43. #define WUPRMSK IOMEM(0xe6180028)
  44. #define WUPSMSK IOMEM(0xe618002c)
  45. #define WUPSMSK2 IOMEM(0xe6180048)
  46. #define WUPSFAC IOMEM(0xe6180098)
  47. #define IRQCR IOMEM(0xe618022c)
  48. #define IRQCR2 IOMEM(0xe6180238)
  49. #define IRQCR3 IOMEM(0xe6180244)
  50. #define IRQCR4 IOMEM(0xe6180248)
  51. #define PDNSEL IOMEM(0xe6180254)
  52. /* INTC */
  53. #define ICR1A IOMEM(0xe6900000)
  54. #define ICR2A IOMEM(0xe6900004)
  55. #define ICR3A IOMEM(0xe6900008)
  56. #define ICR4A IOMEM(0xe690000c)
  57. #define INTMSK00A IOMEM(0xe6900040)
  58. #define INTMSK10A IOMEM(0xe6900044)
  59. #define INTMSK20A IOMEM(0xe6900048)
  60. #define INTMSK30A IOMEM(0xe690004c)
  61. /* MFIS */
  62. /* FIXME: pointing where? */
  63. #define SMFRAM 0xe6a70000
  64. /* AP-System Core */
  65. #define APARMBAREA IOMEM(0xe6f10020)
  66. #ifdef CONFIG_PM
  67. #define PM_DOMAIN_ON_OFF_LATENCY_NS 250000
  68. static int sh7372_a4r_pd_suspend(void)
  69. {
  70. sh7372_intcs_suspend();
  71. __raw_writel(0x300fffff, WUPRMSK); /* avoid wakeup */
  72. return 0;
  73. }
  74. static bool a4s_suspend_ready;
  75. static int sh7372_a4s_pd_suspend(void)
  76. {
  77. /*
  78. * The A4S domain contains the CPU core and therefore it should
  79. * only be turned off if the CPU is not in use. This may happen
  80. * during system suspend, when SYSC is going to be used for generating
  81. * resume signals and a4s_suspend_ready is set to let
  82. * sh7372_enter_suspend() know that it can turn A4S off.
  83. */
  84. a4s_suspend_ready = true;
  85. return -EBUSY;
  86. }
  87. static void sh7372_a4s_pd_resume(void)
  88. {
  89. a4s_suspend_ready = false;
  90. }
  91. static int sh7372_a3sp_pd_suspend(void)
  92. {
  93. /*
  94. * Serial consoles make use of SCIF hardware located in A3SP,
  95. * keep such power domain on if "no_console_suspend" is set.
  96. */
  97. return console_suspend_enabled ? 0 : -EBUSY;
  98. }
  99. static struct rmobile_pm_domain sh7372_pm_domains[] = {
  100. {
  101. .genpd.name = "A4LC",
  102. .genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,