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- /*
- * arch/arm/mach-pxa/include/mach/mfp-pxa930.h
- *
- * PXA930 specific MFP configuration definitions
- *
- * Copyright (C) 2007-2008 Marvell International Ltd.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
- #ifndef __ASM_ARCH_MFP_PXA9xx_H
- #define __ASM_ARCH_MFP_PXA9xx_H
- #include <mach/mfp-pxa3xx.h>
- /* GPIO */
- #define GPIO46_GPIO MFP_CFG(GPIO46, AF0)
- #define GPIO49_GPIO MFP_CFG(GPIO49, AF0)
- #define GPIO50_GPIO MFP_CFG(GPIO50, AF0)
- #define GPIO51_GPIO MFP_CFG(GPIO51, AF0)
- #define GPIO52_GPIO MFP_CFG(GPIO52, AF0)
- #define GPIO56_GPIO MFP_CFG(GPIO56, AF0)
- #define GPIO58_GPIO MFP_CFG(GPIO58, AF0)
- #define GPIO59_GPIO MFP_CFG(GPIO59, AF0)
- #define GPIO60_GPIO MFP_CFG(GPIO60, AF0)
- #define GPIO61_GPIO MFP_CFG(GPIO61, AF0)
- #define GPIO62_GPIO MFP_CFG(GPIO62, AF0)
- #define GSIM_UCLK_GPIO_79 MFP_CFG(GSIM_UCLK, AF0)
- #define GSIM_UIO_GPIO_80 MFP_CFG(GSIM_UIO, AF0)
- #define GSIM_nURST_GPIO_81 MFP_CFG(GSIM_nURST, AF0)
- #define GSIM_UDET_GPIO_82 MFP_CFG(GSIM_UDET, AF0)
- #define DF_IO15_GPIO_28 MFP_CFG(DF_IO15, AF0)
- #define DF_IO14_GPIO_29 MFP_CFG(DF_IO14, AF0)
- #define DF_IO13_GPIO_30 MFP_CFG(DF_IO13, AF0)
- #define DF_IO12_GPIO_31 MFP_CFG(DF_IO12, AF0)
- #define DF_IO11_GPIO_32 MFP_CFG(DF_IO11, AF0)
- #define DF_IO10_GPIO_33 MFP_CFG(DF_IO10, AF0)
- #define DF_IO9_GPIO_34 MFP_CFG(DF_IO9, AF0)
- #define DF_IO8_GPIO_35 MFP_CFG(DF_IO8, AF0)
- #define DF_IO7_GPIO_36 MFP_CFG(DF_IO7, AF0)
- #define DF_IO6_GPIO_37 MFP_CFG(DF_IO6, AF0)
- #define DF_IO5_GPIO_38 MFP_CFG(DF_IO5, AF0)
- #define DF_IO4_GPIO_39 MFP_CFG(DF_IO4, AF0)
- #define DF_IO3_GPIO_40 MFP_CFG(DF_IO3, AF0)
- #define DF_IO2_GPIO_41 MFP_CFG(DF_IO2, AF0)
- #define DF_IO1_GPIO_42 MFP_CFG(DF_IO1, AF0)
- #define DF_IO0_GPIO_43 MFP_CFG(DF_IO0, AF0)
- #define DF_nCS0_GPIO_44 MFP_CFG(DF_nCS0, AF0)
- #define DF_nCS1_GPIO_45 MFP_CFG(DF_nCS1, AF0)
- #define DF_nWE_GPIO_46 MFP_CFG(DF_nWE, AF0)
- #define DF_nRE_nOE_GPIO_47 MFP_CFG(DF_nRE_nOE, AF0)
- #define DF_CLE_nOE_GPIO_48 MFP_CFG(DF_CLE_nOE, AF0)
- #define DF_nADV1_ALE_GPIO_49 MFP_CFG(DF_nADV1_ALE, AF0)
- #define DF_nADV2_ALE_GPIO_50 MFP_CFG(DF_nADV2_ALE, AF0)
- #define DF_INT_RnB_GPIO_51 MFP_CFG(DF_INT_RnB, AF0)
- #define DF_SCLK_E_GPIO_52 MFP_CFG(DF_SCLK_E, AF0)
- #define DF_ADDR0_GPIO_53 MFP_CFG(DF_ADDR0, AF0)
- #define DF_ADDR1_GPIO_54 MFP_CFG(DF_ADDR1, AF0)
- #define DF_ADDR2_GPIO_55 MFP_CFG(DF_ADDR2, AF0)
- #define DF_ADDR3_GPIO_56 MFP_CFG(DF_ADDR3, AF0)
- #define nXCVREN_GPIO_57 MFP_CFG(nXCVREN, AF0)
- #define nLUA_GPIO_58 MFP_CFG(nLUA, AF0)
- #define nLLA_GPIO_59 MFP_CFG(nLLA, AF0)
- #define nBE0_GPIO_60 MFP_CFG(nBE0, AF0)
- #define nBE1_GPIO_61 MFP_CFG(nBE1, AF0)
- #define RDY_GPIO_62 MFP_CFG(RDY, AF0)
- #define PMIC_INT_GPIO83 MFP_CFG_LPM(PMIC_INT, AF0, PULL_HIGH)
- /* Chip Select */
- #define DF_nCS0_nCS2 MFP_CFG_LPM(DF_nCS0, AF3, PULL_HIGH)
- #define DF_nCS1_nCS3 MFP_CFG_LPM(DF_nCS1, AF3, PULL_HIGH)
- /* AC97 */
- #define GPIO83_BAC97_SYSCLK MFP_CFG(GPIO83, AF3)
- #define GPIO84_BAC97_SDATA_IN0 MFP_CFG(GPIO84, AF3)
- #define GPIO85_BAC97_BITCLK MFP_CFG(GPIO85, AF3)
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