dataSynchronizationMemory.c 9.9 KB

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  1. /*
  2. * Copyright (C) 2007 Atmel Corporation
  3. *
  4. * This file is subject to the terms and conditions of the GNU General Public
  5. * License. See the file COPYING in the main directory of this archive for
  6. * more details.
  7. */
  8. #include <asm/mach/arch.h>
  9. #include <asm/mach/map.h>
  10. #include <linux/dma-mapping.h>
  11. #include <linux/gpio.h>
  12. #include <linux/platform_device.h>
  13. #include <linux/i2c-gpio.h>
  14. #include <linux/fb.h>
  15. #include <video/atmel_lcdc.h>
  16. #include <mach/at91sam9rl.h>
  17. #include <mach/at91sam9rl_matrix.h>
  18. #include <mach/at91_matrix.h>
  19. #include <mach/at91sam9_smc.h>
  20. #include <linux/platform_data/dma-atmel.h>
  21. #include "board.h"
  22. #include "generic.h"
  23. /* --------------------------------------------------------------------
  24. * HDMAC - AHB DMA Controller
  25. * -------------------------------------------------------------------- */
  26. #if defined(CONFIG_AT_HDMAC) || defined(CONFIG_AT_HDMAC_MODULE)
  27. static u64 hdmac_dmamask = DMA_BIT_MASK(32);
  28. static struct resource hdmac_resources[] = {
  29. [0] = {
  30. .start = AT91SAM9RL_BASE_DMA,
  31. .end = AT91SAM9RL_BASE_DMA + SZ_512 - 1,
  32. .flags = IORESOURCE_MEM,
  33. },
  34. [2] = {
  35. .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_DMA,
  36. .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_DMA,
  37. .flags = IORESOURCE_IRQ,
  38. },
  39. };
  40. static struct platform_device at_hdmac_device = {
  41. .name = "at91sam9rl_dma",
  42. .id = -1,
  43. .dev = {
  44. .dma_mask = &hdmac_dmamask,
  45. .coherent_dma_mask = DMA_BIT_MASK(32),
  46. },
  47. .resource = hdmac_resources,
  48. .num_resources = ARRAY_SIZE(hdmac_resources),
  49. };
  50. void __init at91_add_device_hdmac(void)
  51. {
  52. platform_device_register(&at_hdmac_device);
  53. }
  54. #else
  55. void __init at91_add_device_hdmac(void) {}
  56. #endif
  57. /* --------------------------------------------------------------------
  58. * USB HS Device (Gadget)
  59. * -------------------------------------------------------------------- */
  60. #if defined(CONFIG_USB_ATMEL_USBA) || defined(CONFIG_USB_ATMEL_USBA_MODULE)
  61. static struct resource usba_udc_resources[] = {
  62. [0] = {
  63. .start = AT91SAM9RL_UDPHS_FIFO,
  64. .end = AT91SAM9RL_UDPHS_FIFO + SZ_512K - 1,
  65. .flags = IORESOURCE_MEM,
  66. },
  67. [1] = {
  68. .start = AT91SAM9RL_BASE_UDPHS,
  69. .end = AT91SAM9RL_BASE_UDPHS + SZ_1K - 1,
  70. .flags = IORESOURCE_MEM,
  71. },
  72. [2] = {
  73. .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_UDPHS,
  74. .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_UDPHS,
  75. .flags = IORESOURCE_IRQ,
  76. },
  77. };
  78. #define EP(nam, idx, maxpkt, maxbk, dma, isoc) \
  79. [idx] = { \
  80. .name = nam, \
  81. .index = idx, \
  82. .fifo_size = maxpkt, \
  83. .nr_banks = maxbk, \
  84. .can_dma = dma, \
  85. .can_isoc = isoc, \
  86. }
  87. static struct usba_ep_data usba_udc_ep[] __initdata = {
  88. EP("ep0", 0, 64, 1, 0, 0),
  89. EP("ep1", 1, 1024, 2, 1, 1),
  90. EP("ep2", 2, 1024, 2, 1, 1),
  91. EP("ep3", 3, 1024, 3, 1, 0),
  92. EP("ep4", 4, 1024, 3, 1, 0),
  93. EP("ep5", 5, 1024, 3, 1, 1),
  94. EP("ep6", 6, 1024, 3, 1, 1),
  95. };
  96. #undef EP
  97. /*
  98. * pdata doesn't have room for any endpoints, so we need to
  99. * append room for the ones we need right after it.
  100. */
  101. static struct {
  102. struct usba_platform_data pdata;
  103. struct usba_ep_data ep[7];
  104. } usba_udc_data;
  105. static struct platform_device at91_usba_udc_device = {
  106. .name = "atmel_usba_udc",
  107. .id = -1,
  108. .dev = {
  109. .platform_data = &usba_udc_data.pdata,
  110. },
  111. .resource = usba_udc_resources,
  112. .num_resources = ARRAY_SIZE(usba_udc_resources),
  113. };
  114. void __init at91_add_device_usba(struct usba_platform_data *data)
  115. {
  116. /*
  117. * Invalid pins are 0 on AT91, but the usba driver is shared
  118. * with AVR32, which use negative values instead. Once/if
  119. * gpio_is_valid() is ported to AT91, revisit this code.
  120. */
  121. usba_udc_data.pdata.vbus_pin = -EINVAL;
  122. usba_udc_data.pdata.num_ep = ARRAY_SIZE(usba_udc_ep);
  123. memcpy(usba_udc_data.ep, usba_udc_ep, sizeof(usba_udc_ep));
  124. if (data && gpio_is_valid(data->vbus_pin)) {
  125. at91_set_gpio_input(data->vbus_pin, 0);
  126. at91_set_deglitch(data->vbus_pin, 1);
  127. usba_udc_data.pdata.vbus_pin = data->vbus_pin;
  128. }
  129. /* Pullup pin is handled internally by USB device peripheral */
  130. platform_device_register(&at91_usba_udc_device);
  131. }
  132. #else
  133. void __init at91_add_device_usba(struct usba_platform_data *data) {}
  134. #endif
  135. /* --------------------------------------------------------------------
  136. * MMC / SD
  137. * -------------------------------------------------------------------- */
  138. #if IS_ENABLED(CONFIG_MMC_ATMELMCI)
  139. static u64 mmc_dmamask = DMA_BIT_MASK(32);
  140. static struct mci_platform_data mmc_data;
  141. static struct resource mmc_resources[] = {
  142. [0] = {
  143. .start = AT91SAM9RL_BASE_MCI,
  144. .end = AT91SAM9RL_BASE_MCI + SZ_16K - 1,
  145. .flags = IORESOURCE_MEM,
  146. },
  147. [1] = {
  148. .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_MCI,
  149. .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_MCI,
  150. .flags = IORESOURCE_IRQ,
  151. },
  152. };
  153. static struct platform_device at91sam9rl_mmc_device = {
  154. .name = "atmel_mci",
  155. .id = -1,
  156. .dev = {
  157. .dma_mask = &mmc_dmamask,
  158. .coherent_dma_mask = DMA_BIT_MASK(32),
  159. .platform_data = &mmc_data,
  160. },
  161. .resource = mmc_resources,
  162. .num_resources = ARRAY_SIZE(mmc_resources),
  163. };
  164. void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data)
  165. {
  166. if (!data)
  167. return;
  168. if (data->slot[0].bus_width) {
  169. /* input/irq */
  170. if (gpio_is_valid(data->slot[0].detect_pin)) {
  171. at91_set_gpio_input(data->slot[0].detect_pin, 1);
  172. at91_set_deglitch(data->slot[0].detect_pin, 1);
  173. }
  174. if (gpio_is_valid(data->slot[0].wp_pin))
  175. at91_set_gpio_input(data->slot[0].wp_pin, 1);
  176. /* CLK */
  177. at91_set_A_periph(AT91_PIN_PA2, 0);
  178. /* CMD */
  179. at91_set_A_periph(AT91_PIN_PA1, 1);
  180. /* DAT0, maybe DAT1..DAT3 */
  181. at91_set_A_periph(AT91_PIN_PA0, 1);
  182. if (data->slot[0].bus_width == 4) {
  183. at91_set_A_periph(AT91_PIN_PA3, 1);
  184. at91_set_A_periph(AT91_PIN_PA4, 1);
  185. at91_set_A_periph(AT91_PIN_PA5, 1);
  186. }
  187. mmc_data = *data;
  188. platform_device_register(&at91sam9rl_mmc_device);
  189. }
  190. }
  191. #else
  192. void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data) {}
  193. #endif
  194. /* --------------------------------------------------------------------
  195. * NAND / SmartMedia
  196. * -------------------------------------------------------------------- */
  197. #if defined(CONFIG_MTD_NAND_ATMEL) || defined(CONFIG_MTD_NAND_ATMEL_MODULE)
  198. static struct atmel_nand_data nand_data;
  199. #define NAND_BASE AT91_CHIPSELECT_3
  200. static struct resource nand_resources[] = {
  201. [0] = {
  202. .start = NAND_BASE,
  203. .end = NAND_BASE + SZ_256M - 1,
  204. .flags = IORESOURCE_MEM,
  205. },
  206. [1] = {
  207. .start = AT91SAM9RL_BASE_ECC,
  208. .end = AT91SAM9RL_BASE_ECC + SZ_512 - 1,
  209. .flags = IORESOURCE_MEM,
  210. }
  211. };
  212. static struct platform_device atmel_nand_device = {
  213. .name = "atmel_nand",
  214. .id = -1,
  215. .dev = {
  216. .platform_data = &nand_data,
  217. },
  218. .resource = nand_resources,
  219. .num_resources = ARRAY_SIZE(nand_resources),
  220. };
  221. void __init at91_add_device_nand(struct atmel_nand_data *data)
  222. {
  223. unsigned long csa;
  224. if (!data)
  225. return;
  226. csa = at91_matrix_read(AT91_MATRIX_EBICSA);
  227. at91_matrix_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
  228. /* enable pin */
  229. if (gpio_is_valid(data->enable_pin))
  230. at91_set_gpio_output(data->enable_pin, 1);
  231. /* ready/busy pin */
  232. if (gpio_is_valid(data->rdy_pin))
  233. at91_set_gpio_input(data->rdy_pin, 1);
  234. /* card detect pin */
  235. if (gpio_is_valid(data->det_pin))
  236. at91_set_gpio_input(data->det_pin, 1);
  237. at91_set_A_periph(AT91_PIN_PB4, 0); /* NANDOE */
  238. at91_set_A_periph(AT91_PIN_PB5, 0); /* NANDWE */
  239. nand_data = *data;
  240. platform_device_register(&atmel_nand_device);
  241. }
  242. #else
  243. void __init at91_add_device_nand(struct atmel_nand_data *data) {}
  244. #endif
  245. /* --------------------------------------------------------------------
  246. * TWI (i2c)
  247. * -------------------------------------------------------------------- */
  248. /*
  249. * Prefer the GPIO code since the TWI controller isn't robust
  250. * (gets overruns and underruns under load) and can only issue
  251. * repeated STARTs in one scenario (the driver doesn't yet handle them).
  252. */
  253. #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
  254. static struct i2c_gpio_platform_data pdata = {
  255. .sda_pin = AT91_PIN_PA23,
  256. .sda_is_open_drain = 1,
  257. .scl_pin = AT91_PIN_PA24,
  258. .scl_is_open_drain = 1,
  259. .udelay = 2, /* ~100 kHz */
  260. };
  261. static struct platform_device at91sam9rl_twi_device = {
  262. .name = "i2c-gpio",
  263. .id = 0,
  264. .dev.platform_data = &pdata,
  265. };
  266. void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
  267. {
  268. at91_set_GPIO_periph(AT91_PIN_PA23, 1); /* TWD (SDA) */
  269. at91_set_multi_drive(AT91_PIN_PA23, 1);
  270. at91_set_GPIO_periph(AT91_PIN_PA24, 1); /* TWCK (SCL) */
  271. at91_set_multi_drive(AT91_PIN_PA24, 1);
  272. i2c_register_board_info(0, devices, nr_devices);
  273. platform_device_register(&at91sam9rl_twi_device);
  274. }
  275. #elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
  276. static struct resource twi_resources[] = {
  277. [0] = {
  278. .start = AT91SAM9RL_BASE_TWI0,
  279. .end = AT91SAM9RL_BASE_TWI0 + SZ_16K - 1,
  280. .flags = IORESOURCE_MEM,
  281. },
  282. [1] = {
  283. .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_TWI0,
  284. .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_TWI0,
  285. .flags = IORESOURCE_IRQ,
  286. },
  287. };
  288. static struct platform_device at91sam9rl_twi_device = {
  289. .name = "i2c-at91sam9g20",
  290. .id = 0,
  291. .resource = twi_resources,
  292. .num_resources = ARRAY_SIZE(twi_resources),
  293. };
  294. void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
  295. {
  296. /* pins used for TWI interface */
  297. at91_set_A_periph(AT91_PIN_PA23, 0); /* TWD */
  298. at91_set_multi_drive(AT91_PIN_PA23, 1);
  299. at91_set_A_periph(AT91_PIN_PA24, 0); /* TWCK */
  300. at91_set_multi_drive(AT91_PIN_PA24, 1);
  301. i2c_register_board_info(0, devices, nr_devices);
  302. platform_device_register(&at91sam9rl_twi_device);
  303. }
  304. #else
  305. void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
  306. #endif
  307. /* --------------------------------------------------------------------
  308. * SPI
  309. * -------------------------------------------------------------------- */
  310. #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
  311. static u64 spi_dmamask = DMA_BIT_MASK(32);
  312. static struct resource spi_resources[] = {
  313. [0] = {
  314. .start = AT91SAM9RL_BASE_SPI,
  315. .end = AT91SAM9RL_BASE_SPI + SZ_16K - 1,
  316. .flags = IORESOURCE_MEM,
  317. },
  318. [1] = {
  319. .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_SPI,
  320. .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_SPI,
  321. .flags = IORESOURCE_IRQ,
  322. },
  323. };