synchronousMemoryDatabase.c 6.0 KB

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  1. /*
  2. * arch/arm/mach-at91/at91sam9263.c
  3. *
  4. * Copyright (C) 2007 Atmel Corporation.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. */
  12. #include <linux/module.h>
  13. #include <asm/proc-fns.h>
  14. #include <asm/irq.h>
  15. #include <asm/mach/arch.h>
  16. #include <asm/mach/map.h>
  17. #include <asm/system_misc.h>
  18. #include <mach/at91sam9263.h>
  19. #include <mach/at91_pmc.h>
  20. #include "at91_aic.h"
  21. #include "at91_rstc.h"
  22. #include "soc.h"
  23. #include "generic.h"
  24. #include "clock.h"
  25. #include "sam9_smc.h"
  26. /* --------------------------------------------------------------------
  27. * Clocks
  28. * -------------------------------------------------------------------- */
  29. /*
  30. * The peripheral clocks.
  31. */
  32. static struct clk pioA_clk = {
  33. .name = "pioA_clk",
  34. .pmc_mask = 1 << AT91SAM9263_ID_PIOA,
  35. .type = CLK_TYPE_PERIPHERAL,
  36. };
  37. static struct clk pioB_clk = {
  38. .name = "pioB_clk",
  39. .pmc_mask = 1 << AT91SAM9263_ID_PIOB,
  40. .type = CLK_TYPE_PERIPHERAL,
  41. };
  42. static struct clk pioCDE_clk = {
  43. .name = "pioCDE_clk",
  44. .pmc_mask = 1 << AT91SAM9263_ID_PIOCDE,
  45. .type = CLK_TYPE_PERIPHERAL,
  46. };
  47. static struct clk usart0_clk = {
  48. .name = "usart0_clk",
  49. .pmc_mask = 1 << AT91SAM9263_ID_US0,
  50. .type = CLK_TYPE_PERIPHERAL,
  51. };
  52. static struct clk usart1_clk = {
  53. .name = "usart1_clk",
  54. .pmc_mask = 1 << AT91SAM9263_ID_US1,
  55. .type = CLK_TYPE_PERIPHERAL,
  56. };
  57. static struct clk usart2_clk = {
  58. .name = "usart2_clk",
  59. .pmc_mask = 1 << AT91SAM9263_ID_US2,
  60. .type = CLK_TYPE_PERIPHERAL,
  61. };
  62. static struct clk mmc0_clk = {
  63. .name = "mci0_clk",
  64. .pmc_mask = 1 << AT91SAM9263_ID_MCI0,
  65. .type = CLK_TYPE_PERIPHERAL,
  66. };
  67. static struct clk mmc1_clk = {
  68. .name = "mci1_clk",
  69. .pmc_mask = 1 << AT91SAM9263_ID_MCI1,
  70. .type = CLK_TYPE_PERIPHERAL,
  71. };
  72. static struct clk can_clk = {
  73. .name = "can_clk",
  74. .pmc_mask = 1 << AT91SAM9263_ID_CAN,
  75. .type = CLK_TYPE_PERIPHERAL,
  76. };
  77. static struct clk twi_clk = {
  78. .name = "twi_clk",
  79. .pmc_mask = 1 << AT91SAM9263_ID_TWI,
  80. .type = CLK_TYPE_PERIPHERAL,
  81. };
  82. static struct clk spi0_clk = {
  83. .name = "spi0_clk",
  84. .pmc_mask = 1 << AT91SAM9263_ID_SPI0,
  85. .type = CLK_TYPE_PERIPHERAL,
  86. };
  87. static struct clk spi1_clk = {
  88. .name = "spi1_clk",
  89. .pmc_mask = 1 << AT91SAM9263_ID_SPI1,
  90. .type = CLK_TYPE_PERIPHERAL,
  91. };
  92. static struct clk ssc0_clk = {
  93. .name = "ssc0_clk",
  94. .pmc_mask = 1 << AT91SAM9263_ID_SSC0,
  95. .type = CLK_TYPE_PERIPHERAL,
  96. };
  97. static struct clk ssc1_clk = {
  98. .name = "ssc1_clk",
  99. .pmc_mask = 1 << AT91SAM9263_ID_SSC1,
  100. .type = CLK_TYPE_PERIPHERAL,
  101. };
  102. static struct clk ac97_clk = {
  103. .name = "ac97_clk",
  104. .pmc_mask = 1 << AT91SAM9263_ID_AC97C,
  105. .type = CLK_TYPE_PERIPHERAL,
  106. };
  107. static struct clk tcb_clk = {
  108. .name = "tcb_clk",
  109. .pmc_mask = 1 << AT91SAM9263_ID_TCB,
  110. .type = CLK_TYPE_PERIPHERAL,
  111. };
  112. static struct clk pwm_clk = {
  113. .name = "pwm_clk",
  114. .pmc_mask = 1 << AT91SAM9263_ID_PWMC,
  115. .type = CLK_TYPE_PERIPHERAL,
  116. };
  117. static struct clk macb_clk = {
  118. .name = "pclk",
  119. .pmc_mask = 1 << AT91SAM9263_ID_EMAC,
  120. .type = CLK_TYPE_PERIPHERAL,
  121. };
  122. static struct clk dma_clk = {
  123. .name = "dma_clk",
  124. .pmc_mask = 1 << AT91SAM9263_ID_DMA,
  125. .type = CLK_TYPE_PERIPHERAL,
  126. };
  127. static struct clk twodge_clk = {
  128. .name = "2dge_clk",
  129. .pmc_mask = 1 << AT91SAM9263_ID_2DGE,
  130. .type = CLK_TYPE_PERIPHERAL,
  131. };
  132. static struct clk udc_clk = {
  133. .name = "udc_clk",
  134. .pmc_mask = 1 << AT91SAM9263_ID_UDP,
  135. .type = CLK_TYPE_PERIPHERAL,
  136. };
  137. static struct clk isi_clk = {
  138. .name = "isi_clk",
  139. .pmc_mask = 1 << AT91SAM9263_ID_ISI,
  140. .type = CLK_TYPE_PERIPHERAL,
  141. };
  142. static struct clk lcdc_clk = {
  143. .name = "lcdc_clk",
  144. .pmc_mask = 1 << AT91SAM9263_ID_LCDC,
  145. .type = CLK_TYPE_PERIPHERAL,
  146. };
  147. static struct clk ohci_clk = {
  148. .name = "ohci_clk",
  149. .pmc_mask = 1 << AT91SAM9263_ID_UHP,
  150. .type = CLK_TYPE_PERIPHERAL,
  151. };
  152. static struct clk *periph_clocks[] __initdata = {
  153. &pioA_clk,
  154. &pioB_clk,
  155. &pioCDE_clk,
  156. &usart0_clk,
  157. &usart1_clk,
  158. &usart2_clk,
  159. &mmc0_clk,
  160. &mmc1_clk,
  161. &can_clk,
  162. &twi_clk,
  163. &spi0_clk,
  164. &spi1_clk,
  165. &ssc0_clk,
  166. &ssc1_clk,
  167. &ac97_clk,
  168. &tcb_clk,
  169. &pwm_clk,
  170. &macb_clk,
  171. &twodge_clk,
  172. &udc_clk,
  173. &isi_clk,
  174. &lcdc_clk,
  175. &dma_clk,
  176. &ohci_clk,
  177. // irq0 .. irq1
  178. };
  179. static struct clk_lookup periph_clocks_lookups[] = {
  180. /* One additional fake clock for macb_hclk */
  181. CLKDEV_CON_ID("hclk", &macb_clk),
  182. CLKDEV_CON_DEV_ID("pclk", "at91rm9200_ssc.0", &ssc0_clk),
  183. CLKDEV_CON_DEV_ID("pclk", "at91rm9200_ssc.1", &ssc1_clk),
  184. CLKDEV_CON_DEV_ID("pclk", "fff98000.ssc", &ssc0_clk),
  185. CLKDEV_CON_DEV_ID("pclk", "fff9c000.ssc", &ssc1_clk),
  186. CLKDEV_CON_DEV_ID("mci_clk", "atmel_mci.0", &mmc0_clk),
  187. CLKDEV_CON_DEV_ID("mci_clk", "atmel_mci.1", &mmc1_clk),
  188. CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk),
  189. CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk),
  190. CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tcb_clk),
  191. CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9260.0", &twi_clk),
  192. /* fake hclk clock */
  193. CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk),
  194. CLKDEV_CON_ID("pioA", &pioA_clk),
  195. CLKDEV_CON_ID("pioB", &pioB_clk),
  196. CLKDEV_CON_ID("pioC", &pioCDE_clk),
  197. CLKDEV_CON_ID("pioD", &pioCDE_clk),
  198. CLKDEV_CON_ID("pioE", &pioCDE_clk),
  199. /* more usart lookup table for DT entries */
  200. CLKDEV_CON_DEV_ID("usart", "ffffee00.serial", &mck),
  201. CLKDEV_CON_DEV_ID("usart", "fff8c000.serial", &usart0_clk),
  202. CLKDEV_CON_DEV_ID("usart", "fff90000.serial", &usart1_clk),
  203. CLKDEV_CON_DEV_ID("usart", "fff94000.serial", &usart2_clk),
  204. /* more tc lookup table for DT entries */
  205. CLKDEV_CON_DEV_ID("t0_clk", "fff7c000.timer", &tcb_clk),
  206. CLKDEV_CON_DEV_ID("hclk", "a00000.ohci", &ohci_clk),
  207. CLKDEV_CON_DEV_ID("spi_clk", "fffa4000.spi", &spi0_clk),
  208. CLKDEV_CON_DEV_ID("spi_clk", "fffa8000.spi", &spi1_clk),
  209. CLKDEV_CON_DEV_ID("mci_clk", "fff80000.mmc", &mmc0_clk),
  210. CLKDEV_CON_DEV_ID("mci_clk", "fff84000.mmc", &mmc1_clk),
  211. CLKDEV_CON_DEV_ID(NULL, "fff88000.i2c", &twi_clk),
  212. CLKDEV_CON_DEV_ID(NULL, "fffff200.gpio", &pioA_clk),
  213. CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioB_clk),
  214. CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioCDE_clk),