functionDefinition.c 3.1 KB

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  1. /*
  2. * arch/arm/mach-orion5x/db88f5281-setup.c
  3. *
  4. * Marvell Orion-2 Development Board Setup
  5. *
  6. * Maintainer: Tzachi Perelstein <tzachi@marvell.com>
  7. *
  8. * This file is licensed under the terms of the GNU General Public
  9. * License version 2. This program is licensed "as is" without any
  10. * warranty of any kind, whether express or implied.
  11. */
  12. #include <linux/gpio.h>
  13. #include <linux/kernel.h>
  14. #include <linux/init.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/pci.h>
  17. #include <linux/irq.h>
  18. #include <linux/mtd/physmap.h>
  19. #include <linux/mtd/nand.h>
  20. #include <linux/timer.h>
  21. #include <linux/mv643xx_eth.h>
  22. #include <linux/i2c.h>
  23. #include <asm/mach-types.h>
  24. #include <asm/mach/arch.h>
  25. #include <asm/mach/pci.h>
  26. #include <mach/orion5x.h>
  27. #include <linux/platform_data/mtd-orion_nand.h>
  28. #include "common.h"
  29. #include "mpp.h"
  30. /*****************************************************************************
  31. * DB-88F5281 on board devices
  32. ****************************************************************************/
  33. /*
  34. * 512K NOR flash Device bus boot chip select
  35. */
  36. #define DB88F5281_NOR_BOOT_BASE 0xf4000000
  37. #define DB88F5281_NOR_BOOT_SIZE SZ_512K
  38. /*
  39. * 7-Segment on Device bus chip select 0
  40. */
  41. #define DB88F5281_7SEG_BASE 0xfa000000
  42. #define DB88F5281_7SEG_SIZE SZ_1K
  43. /*
  44. * 32M NOR flash on Device bus chip select 1
  45. */
  46. #define DB88F5281_NOR_BASE 0xfc000000
  47. #define DB88F5281_NOR_SIZE SZ_32M
  48. /*
  49. * 32M NAND flash on Device bus chip select 2
  50. */
  51. #define DB88F5281_NAND_BASE 0xfa800000
  52. #define DB88F5281_NAND_SIZE SZ_1K
  53. /*
  54. * PCI
  55. */
  56. #define DB88F5281_PCI_SLOT0_OFFS 7
  57. #define DB88F5281_PCI_SLOT0_IRQ_PIN 12
  58. #define DB88F5281_PCI_SLOT1_SLOT2_IRQ_PIN 13
  59. /*****************************************************************************
  60. * 512M NOR Flash on Device bus Boot CS
  61. ****************************************************************************/
  62. static struct physmap_flash_data db88f5281_boot_flash_data = {
  63. .width = 1, /* 8 bit bus width */
  64. };
  65. static struct resource db88f5281_boot_flash_resource = {
  66. .flags = IORESOURCE_MEM,
  67. .start = DB88F5281_NOR_BOOT_BASE,
  68. .end = DB88F5281_NOR_BOOT_BASE + DB88F5281_NOR_BOOT_SIZE - 1,
  69. };
  70. static struct platform_device db88f5281_boot_flash = {
  71. .name = "physmap-flash",
  72. .id = 0,
  73. .dev = {
  74. .platform_data = &db88f5281_boot_flash_data,
  75. },
  76. .num_resources = 1,
  77. .resource = &db88f5281_boot_flash_resource,
  78. };
  79. /*****************************************************************************
  80. * 32M NOR Flash on Device bus CS1
  81. ****************************************************************************/
  82. static struct physmap_flash_data db88f5281_nor_flash_data = {
  83. .width = 4, /* 32 bit bus width */
  84. };
  85. static struct resource db88f5281_nor_flash_resource = {
  86. .flags = IORESOURCE_MEM,
  87. .start = DB88F5281_NOR_BASE,
  88. .end = DB88F5281_NOR_BASE + DB88F5281_NOR_SIZE - 1,
  89. };
  90. static struct platform_device db88f5281_nor_flash = {
  91. .name = "physmap-flash",
  92. .id = 1,
  93. .dev = {
  94. .platform_data = &db88f5281_nor_flash_data,
  95. },
  96. .num_resources = 1,
  97. .resource = &db88f5281_nor_flash_resource,
  98. };
  99. /*****************************************************************************
  100. * 32M NAND Flash on Device bus CS2