#ifndef __ARCH_ARM_MACH_OMAP2_CM_REGBITS_24XX_H
#define __ARCH_ARM_MACH_OMAP2_CM_REGBITS_24XX_H

/*
 * OMAP24XX Clock Management register bits
 *
 * Copyright (C) 2007 Texas Instruments, Inc.
 * Copyright (C) 2007 Nokia Corporation
 *
 * Written by Paul Walmsley
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

/* Bits shared between registers */

/* CM_FCLKEN1_CORE and CM_ICLKEN1_CORE shared bits */
#define OMAP24XX_EN_CAM_SHIFT				31
#define OMAP24XX_EN_CAM_MASK				(1 << 31)
#define OMAP24XX_EN_WDT4_SHIFT				29
#define OMAP24XX_EN_WDT4_MASK				(1 << 29)
#define OMAP2420_EN_WDT3_SHIFT				28
#define OMAP2420_EN_WDT3_MASK				(1 << 28)
#define OMAP24XX_EN_MSPRO_SHIFT				27
#define OMAP24XX_EN_MSPRO_MASK				(1 << 27)
#define OMAP24XX_EN_FAC_SHIFT				25
#define OMAP24XX_EN_FAC_MASK				(1 << 25)
#define OMAP2420_EN_EAC_SHIFT				24
#define OMAP2420_EN_EAC_MASK				(1 << 24)
#define OMAP24XX_EN_HDQ_SHIFT				23
#define OMAP24XX_EN_HDQ_MASK				(1 << 23)
#define OMAP2420_EN_I2C2_SHIFT				20
#define OMAP2420_EN_I2C2_MASK				(1 << 20)
#define OMAP2420_EN_I2C1_SHIFT				19
#define OMAP2420_EN_I2C1_MASK				(1 << 19)

/* CM_FCLKEN2_CORE and CM_ICLKEN2_CORE shared bits */
#define OMAP2430_EN_MCBSP5_SHIFT			5
#define OMAP2430_EN_MCBSP5_MASK				(1 << 5)
#define OMAP2430_EN_MCBSP4_SHIFT			4
#define OMAP2430_EN_MCBSP4_MASK				(1 << 4)
#define OMAP2430_EN_MCBSP3_SHIFT			3
#define OMAP2430_EN_MCBSP3_MASK				(1 << 3)
#define OMAP24XX_EN_SSI_SHIFT				1
#define OMAP24XX_EN_SSI_MASK				(1 << 1)

/* CM_FCLKEN_WKUP and CM_ICLKEN_WKUP shared bits */
#define OMAP24XX_EN_MPU_WDT_SHIFT			3
#define OMAP24XX_EN_MPU_WDT_MASK			(1 << 3)

/* Bits specific to each register */

/* CM_IDLEST_MPU */
/* 2430 only */
#define OMAP2430_ST_MPU_MASK				(1 << 0)

/* CM_CLKSEL_MPU */
#define OMAP24XX_CLKSEL_MPU_SHIFT			0
#define OMAP24XX_CLKSEL_MPU_MASK			(0x1f << 0)
#define OMAP24XX_CLKSEL_MPU_WIDTH			5