/* * This is the configuration for SSV Dil/NetPC DNP/5370 board. * * DIL module: http://www.dilnetpc.com/dnp0086.htm * SK28 (starter kit): http://www.dilnetpc.com/dnp0088.htm * * Copyright 2010 3ality Digital Systems * Copyright 2005 National ICT Australia (NICTA) * Copyright 2004-2006 Analog Devices Inc. * * Licensed under the GPL-2 or later. */ #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include /* * Name the Board for the /proc/cpuinfo */ const char bfin_board_name[] = "DNP/5370"; #define FLASH_MAC 0x202f0000 #define CONFIG_MTD_PHYSMAP_LEN 0x300000 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) static struct platform_device rtc_device = { .name = "rtc-bfin", .id = -1, }; #endif #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) #include static const unsigned short bfin_mac_peripherals[] = P_RMII0; static struct bfin_phydev_platform_data bfin_phydev_data[] = { { .addr = 1, .irq = PHY_POLL, /* IRQ_MAC_PHYINT */ }, }; static struct bfin_mii_bus_platform_data bfin_mii_bus_data = { .phydev_number = 1, .phydev_data = bfin_phydev_data, .phy_mode = PHY_INTERFACE_MODE_RMII, .mac_peripherals = bfin_mac_peripherals, }; static struct platform_device bfin_mii_bus = { .name = "bfin_mii_bus", .dev = { .platform_data = &bfin_mii_bus_data, } }; static struct platform_device bfin_mac_device = { .name = "bfin_mac", .dev = { .platform_data = &bfin_mii_bus, } }; #endif #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) static struct mtd_partition asmb_flash_partitions[] = { { .name = "bootloader(nor)", .size = 0x30000, .offset = 0, }, { .name = "linux kernel and rootfs(nor)", .size = 0x300000 - 0x30000 - 0x10000, .offset = MTDPART_OFS_APPEND, }, { .name = "MAC address(nor)", .size = 0x10000, .offset = MTDPART_OFS_APPEND, .mask_flags = MTD_WRITEABLE, } }; static struct physmap_flash_data asmb_flash_data = { .width = 1, .parts = asmb_flash_partitions, .nr_parts = ARRAY_SIZE(asmb_flash_partitions), }; static struct resource asmb_flash_resource = { .start = 0x20000000, .end = 0x202fffff, .flags = IORESOURCE_MEM, }; /* 4 MB NOR flash attached to async memory banks 0-2, * therefore only 3 MB visible. */ static struct platform_device asmb_flash_device = { .name = "physmap-flash", .id = 0, .dev = { .platform_data = &asmb_flash_data, }, .num_resources = 1, .resource = &asmb_flash_resource, }; #endif #if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE) #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) static struct bfin5xx_spi_chip mmc_spi_chip_info = { .enable_dma = 0, /* use no dma transfer with this chip*/ }; #endif #if defined(CONFIG_MTD_DATAFLASH) || defined(CONFIG_MTD_DATAFLASH_MODULE) /* This mapping is for at45db642 it has 1056 page size, * partition size and offset should be page aligned */ static struct mtd_partition bfin_spi_dataflash_partitions[] = { { .name = "JFFS2 dataflash(nor)", #ifdef CONFIG_MTD_PAGESIZE_1024 .offset = 0x40000, .size = 0x7C0000, #else .offset = 0x0, .size = 0x840000, #endif } }; static struct flash_platform_data bfin_spi_dataflash_data = { .name = "mtd_dataflash", .parts = bfin_spi_dataflash_partitions, .nr_parts = ARRAY_SIZE(bfin_spi_dataflash_partitions), .type = "mtd_dataflash", }; static struct bfin5xx_spi_chip spi_dataflash_chip_info = { .enable_dma = 0, /* use no dma transfer with this chip*/ }; #endif static struct spi_board_info bfin_spi_board_info[] __initdata = { /* SD/MMC card reader at SPI bus */ #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) { .modalias = "mmc_spi", .max_speed_hz = 20000000, .bus_num = 0, .chip_select = 1, .controller_data = &mmc_spi_chip_info, .mode = SPI_MODE_3, }, #endif /* 8 Megabyte Atmel NOR flash chip at SPI bus */ #if defined(CONFIG_MTD_DATAFLASH) || defined(CONFIG_MTD_DATAFLASH_MODULE) { .modalias = "mtd_dataflash", .max_speed_hz = 16700000, .bus_num = 0, .chip_select = 2,