/* * Copyright 2008-2010 Analog Devices Inc. * * Licensed under the GPL-2 or later. */ #ifndef _CDEF_BF547_H #define _CDEF_BF547_H /* include cdefBF54x_base.h for the set of #defines that are common to all ADSP-BF54x bfin_read_()rocessors */ #include "cdefBF54x_base.h" /* The following are the #defines needed by ADSP-BF547 that are not in the common header */ /* Timer Registers */ #define bfin_read_TIMER8_CONFIG() bfin_read16(TIMER8_CONFIG) #define bfin_write_TIMER8_CONFIG(val) bfin_write16(TIMER8_CONFIG, val) #define bfin_read_TIMER8_COUNTER() bfin_read32(TIMER8_COUNTER) #define bfin_write_TIMER8_COUNTER(val) bfin_write32(TIMER8_COUNTER, val) #define bfin_read_TIMER8_PERIOD() bfin_read32(TIMER8_PERIOD) #define bfin_write_TIMER8_PERIOD(val) bfin_write32(TIMER8_PERIOD, val) #define bfin_read_TIMER8_WIDTH() bfin_read32(TIMER8_WIDTH) #define bfin_write_TIMER8_WIDTH(val) bfin_write32(TIMER8_WIDTH, val) #define bfin_read_TIMER9_CONFIG() bfin_read16(TIMER9_CONFIG) #define bfin_write_TIMER9_CONFIG(val) bfin_write16(TIMER9_CONFIG, val) #define bfin_read_TIMER9_COUNTER() bfin_read32(TIMER9_COUNTER) #define bfin_write_TIMER9_COUNTER(val) bfin_write32(TIMER9_COUNTER, val) #define bfin_read_TIMER9_PERIOD() bfin_read32(TIMER9_PERIOD) #define bfin_write_TIMER9_PERIOD(val) bfin_write32(TIMER9_PERIOD, val) #define bfin_read_TIMER9_WIDTH() bfin_read32(TIMER9_WIDTH) #define bfin_write_TIMER9_WIDTH(val) bfin_write32(TIMER9_WIDTH, val) #define bfin_read_TIMER10_CONFIG() bfin_read16(TIMER10_CONFIG) #define bfin_write_TIMER10_CONFIG(val) bfin_write16(TIMER10_CONFIG, val) #define bfin_read_TIMER10_COUNTER() bfin_read32(TIMER10_COUNTER) #define bfin_write_TIMER10_COUNTER(val) bfin_write32(TIMER10_COUNTER, val) #define bfin_read_TIMER10_PERIOD() bfin_read32(TIMER10_PERIOD) #define bfin_write_TIMER10_PERIOD(val) bfin_write32(TIMER10_PERIOD, val) #define bfin_read_TIMER10_WIDTH() bfin_read32(TIMER10_WIDTH) #define bfin_write_TIMER10_WIDTH(val) bfin_write32(TIMER10_WIDTH, val) /* Timer Groubfin_read_() of 3 */ #define bfin_read_TIMER_ENABLE1() bfin_read16(TIMER_ENABLE1) #define bfin_write_TIMER_ENABLE1(val) bfin_write16(TIMER_ENABLE1, val) #define bfin_read_TIMER_DISABLE1() bfin_read16(TIMER_DISABLE1) #define bfin_write_TIMER_DISABLE1(val) bfin_write16(TIMER_DISABLE1, val) #define bfin_read_TIMER_STATUS1() bfin_read32(TIMER_STATUS1) #define bfin_write_TIMER_STATUS1(val) bfin_write32(TIMER_STATUS1, val) /* SPORT0 Registers */ #define bfin_read_SPORT0_TCR1() bfin_read16(SPORT0_TCR1) #define bfin_write_SPORT0_TCR1(val) bfin_write16(SPORT0_TCR1, val) #define bfin_read_SPORT0_TCR2() bfin_read16(SPORT0_TCR2) #define bfin_write_SPORT0_TCR2(val) bfin_write16(SPORT0_TCR2, val) #define bfin_read_SPORT0_TCLKDIV() bfin_read16(SPORT0_TCLKDIV) #define bfin_write_SPORT0_TCLKDIV(val) bfin_write16(SPORT0_TCLKDIV, val) #define bfin_read_SPORT0_TFSDIV() bfin_read16(SPORT0_TFSDIV) #define bfin_write_SPORT0_TFSDIV(val) bfin_write16(SPORT0_TFSDIV, val) #define bfin_read_SPORT0_TX() bfin_read32(SPORT0_TX) #define bfin_write_SPORT0_TX(val) bfin_write32(SPORT0_TX, val) #define bfin_read_SPORT0_RX() bfin_read32(SPORT0_RX) #define bfin_write_SPORT0_RX(val) bfin_write32(SPORT0_RX, val) #define bfin_read_SPORT0_RCR1() bfin_read16(SPORT0_RCR1) #define bfin_write_SPORT0_RCR1(val) bfin_write16(SPORT0_RCR1, val) #define bfin_read_SPORT0_RCR2() bfin_read16(SPORT0_RCR2) #define bfin_write_SPORT0_RCR2(val) bfin_write16(SPORT0_RCR2, val) #define bfin_read_SPORT0_RCLKDIV() bfin_read16(SPORT0_RCLKDIV) #define bfin_write_SPORT0_RCLKDIV(val) bfin_write16(SPORT0_RCLKDIV, val) #define bfin_read_SPORT0_RFSDIV() bfin_read16(SPORT0_RFSDIV) #define bfin_write_SPORT0_RFSDIV(val) bfin_write16(SPORT0_RFSDIV, val) #define bfin_read_SPORT0_STAT() bfin_read16(SPORT0_STAT) #define bfin_write_SPORT0_STAT(val) bfin_write16(SPORT0_STAT, val) #define bfin_read_SPORT0_CHNL() bfin_read16(SPORT0_CHNL) #define bfin_write_SPORT0_CHNL(val) bfin_write16(SPORT0_CHNL, val) #define bfin_read_SPORT0_MCMC1() bfin_read16(SPORT0_MCMC1) #define bfin_write_SPORT0_MCMC1(val) bfin_write16(SPORT0_MCMC1, val) #define bfin_read_SPORT0_MCMC2() bfin_read16(SPORT0_MCMC2) #define bfin_write_SPORT0_MCMC2(val) bfin_write16(SPORT0_MCMC2, val) #define bfin_read_SPORT0_MTCS0() bfin_read32(SPORT0_MTCS0) #define bfin_write_SPORT0_MTCS0(val) bfin_write32(SPORT0_MTCS0, val) #define bfin_read_SPORT0_MTCS1() bfin_read32(SPORT0_MTCS1) #define bfin_write_SPORT0_MTCS1(val) bfin_write32(SPORT0_MTCS1, val) #define bfin_read_SPORT0_MTCS2() bfin_read32(SPORT0_MTCS2) #define bfin_write_SPORT0_MTCS2(val) bfin_write32(SPORT0_MTCS2, val) #define bfin_read_SPORT0_MTCS3() bfin_read32(SPORT0_MTCS3) #define bfin_write_SPORT0_MTCS3(val) bfin_write32(SPORT0_MTCS3, val) #define bfin_read_SPORT0_MRCS0() bfin_read32(SPORT0_MRCS0) #define bfin_write_SPORT0_MRCS0(val) bfin_write32(SPORT0_MRCS0, val) #define bfin_read_SPORT0_MRCS1() bfin_read32(SPORT0_MRCS1) #define bfin_write_SPORT0_MRCS1(val) bfin_write32(SPORT0_MRCS1, val) #define bfin_read_SPORT0_MRCS2() bfin_read32(SPORT0_MRCS2) #define bfin_write_SPORT0_MRCS2(val) bfin_write32(SPORT0_MRCS2, val) #define bfin_read_SPORT0_MRCS3() bfin_read32(SPORT0_MRCS3) #define bfin_write_SPORT0_MRCS3(val) bfin_write32(SPORT0_MRCS3, val) /* EPPI0 Registers */ #define bfin_read_EPPI0_STATUS() bfin_read16(EPPI0_STATUS) #define bfin_write_EPPI0_STATUS(val) bfin_write16(EPPI0_STATUS, val) #define bfin_read_EPPI0_HCOUNT() bfin_read16(EPPI0_HCOUNT) #define bfin_write_EPPI0_HCOUNT(val) bfin_write16(EPPI0_HCOUNT, val) #define bfin_read_EPPI0_HDELAY() bfin_read16(EPPI0_HDELAY) #define bfin_write_EPPI0_HDELAY(val) bfin_write16(EPPI0_HDELAY, val) #define bfin_read_EPPI0_VCOUNT() bfin_read16(EPPI0_VCOUNT) #define bfin_write_EPPI0_VCOUNT(val) bfin_write16(EPPI0_VCOUNT, val) #define bfin_read_EPPI0_VDELAY() bfin_read16(EPPI0_VDELAY) #define bfin_write_EPPI0_VDELAY(val) bfin_write16(EPPI0_VDELAY, val) #define bfin_read_EPPI0_FRAME() bfin_read16(EPPI0_FRAME) #define bfin_write_EPPI0_FRAME(val) bfin_write16(EPPI0_FRAME, val) #define bfin_read_EPPI0_LINE() bfin_read16(EPPI0_LINE) #define bfin_write_EPPI0_LINE(val) bfin_write16(EPPI0_LINE, val) #define bfin_read_EPPI0_CLKDIV() bfin_read16(EPPI0_CLKDIV) #define bfin_write_EPPI0_CLKDIV(val) bfin_write16(EPPI0_CLKDIV, val) #define bfin_read_EPPI0_CONTROL() bfin_read32(EPPI0_CONTROL) #define bfin_write_EPPI0_CONTROL(val) bfin_write32(EPPI0_CONTROL, val) #define bfin_read_EPPI0_FS1W_HBL() bfin_read32(EPPI0_FS1W_HBL) #define bfin_write_EPPI0_FS1W_HBL(val) bfin_write32(EPPI0_FS1W_HBL, val) #define bfin_read_EPPI0_FS1P_AVPL() bfin_read32(EPPI0_FS1P_AVPL) #define bfin_write_EPPI0_FS1P_AVPL(val) bfin_write32(EPPI0_FS1P_AVPL, val) #define bfin_read_EPPI0_FS2W_LVB() bfin_read32(EPPI0_FS2W_LVB) #define bfin_write_EPPI0_FS2W_LVB(val) bfin_write32(EPPI0_FS2W_LVB, val) #define bfin_read_EPPI0_FS2P_LAVF() bfin_read32(EPPI0_FS2P_LAVF) #define bfin_write_EPPI0_FS2P_LAVF(val) bfin_write32(EPPI0_FS2P_LAVF, val) #define bfin_read_EPPI0_CLIP() bfin_read32(EPPI0_CLIP) #define bfin_write_EPPI0_CLIP(val) bfin_write32(EPPI0_CLIP, val) /* UART2 Registers */ #define bfin_read_UART2_DLL() bfin_read16(UART2_DLL) #define bfin_write_UART2_DLL(val) bfin_write16(UART2_DLL, val) #define bfin_read_UART2_DLH() bfin_read16(UART2_DLH) #define bfin_write_UART2_DLH(val) bfin_write16(UART2_DLH, val) #define bfin_read_UART2_GCTL() bfin_read16(UART2_GCTL) #define bfin_write_UART2_GCTL(val) bfin_write16(UART2_GCTL, val)