/*
 * Copyright (C) 2009 Nokia
 * Copyright (C) 2009 Texas Instruments
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#define OMAP2420_CONTROL_PADCONF_MUX_PBASE			0x48000030LU

#define OMAP2420_MUX(mode0, mux_value)					\
{									\
	.reg_offset	= (OMAP2420_CONTROL_PADCONF_##mode0##_OFFSET),	\
	.value		= (mux_value),					\
}

/*
 * OMAP2420 CONTROL_PADCONF* register offsets for pin-muxing
 *
 * Extracted from the TRM.  Add 0x48000030 to these values to get the
 * absolute addresses.  The name in the macro is the mode-0 name of
 * the pin.  NOTE: These registers are 8-bits wide.
 */
#define OMAP2420_CONTROL_PADCONF_SDRC_A14_OFFSET			0x000
#define OMAP2420_CONTROL_PADCONF_SDRC_A13_OFFSET			0x001
#define OMAP2420_CONTROL_PADCONF_SDRC_A12_OFFSET			0x002
#define OMAP2420_CONTROL_PADCONF_SDRC_BA1_OFFSET			0x003
#define OMAP2420_CONTROL_PADCONF_SDRC_BA0_OFFSET			0x004
#define OMAP2420_CONTROL_PADCONF_SDRC_A11_OFFSET			0x005
#define OMAP2420_CONTROL_PADCONF_SDRC_A10_OFFSET			0x006
#define OMAP2420_CONTROL_PADCONF_SDRC_A9_OFFSET				0x007
#define OMAP2420_CONTROL_PADCONF_SDRC_A8_OFFSET				0x008
#define OMAP2420_CONTROL_PADCONF_SDRC_A7_OFFSET				0x009
#define OMAP2420_CONTROL_PADCONF_SDRC_A6_OFFSET				0x00a
#define OMAP2420_CONTROL_PADCONF_SDRC_A5_OFFSET				0x00b
#define OMAP2420_CONTROL_PADCONF_SDRC_A4_OFFSET				0x00c
#define OMAP2420_CONTROL_PADCONF_SDRC_A3_OFFSET				0x00d
#define OMAP2420_CONTROL_PADCONF_SDRC_A2_OFFSET				0x00e
#define OMAP2420_CONTROL_PADCONF_SDRC_A1_OFFSET				0x00f
#define OMAP2420_CONTROL_PADCONF_SDRC_A0_OFFSET				0x010
#define OMAP2420_CONTROL_PADCONF_SDRC_D31_OFFSET			0x021
#define OMAP2420_CONTROL_PADCONF_SDRC_D30_OFFSET			0x022
#define OMAP2420_CONTROL_PADCONF_SDRC_D29_OFFSET			0x023
#define OMAP2420_CONTROL_PADCONF_SDRC_D28_OFFSET			0x024
#define OMAP2420_CONTROL_PADCONF_SDRC_D27_OFFSET			0x025
#define OMAP2420_CONTROL_PADCONF_SDRC_D26_OFFSET			0x026
#define OMAP2420_CONTROL_PADCONF_SDRC_D25_OFFSET			0x027
#define OMAP2420_CONTROL_PADCONF_SDRC_D24_OFFSET			0x028
#define OMAP2420_CONTROL_PADCONF_SDRC_D23_OFFSET			0x029
#define OMAP2420_CONTROL_PADCONF_SDRC_D22_OFFSET			0x02a
#define OMAP2420_CONTROL_PADCONF_SDRC_D21_OFFSET			0x02b
#define OMAP2420_CONTROL_PADCONF_SDRC_D20_OFFSET			0x02c
#define OMAP2420_CONTROL_PADCONF_SDRC_D19_OFFSET			0x02d
#define OMAP2420_CONTROL_PADCONF_SDRC_D18_OFFSET			0x02e
#define OMAP2420_CONTROL_PADCONF_SDRC_D17_OFFSET			0x02f
#define OMAP2420_CONTROL_PADCONF_SDRC_D16_OFFSET			0x030
#define OMAP2420_CONTROL_PADCONF_SDRC_D15_OFFSET			0x031
#define OMAP2420_CONTROL_PADCONF_SDRC_D14_OFFSET			0x032
#define OMAP2420_CONTROL_PADCONF_SDRC_D13_OFFSET			0x033
#define OMAP2420_CONTROL_PADCONF_SDRC_D12_OFFSET			0x034
#define OMAP2420_CONTROL_PADCONF_SDRC_D11_OFFSET			0x035