/* ** linux/atarihw.h -- This header defines some macros and pointers for ** the various Atari custom hardware registers. ** ** Copyright 1994 by Björn Brauel ** ** 5/1/94 Roman Hodek: ** Added definitions for TT specific chips. ** ** 1996-09-13 lars brinkhoff : ** Finally added definitions for the matrix/codec and the DSP56001 host ** interface. ** ** This file is subject to the terms and conditions of the GNU General Public ** License. See the file COPYING in the main directory of this archive ** for more details. ** */ #ifndef _LINUX_ATARIHW_H_ #define _LINUX_ATARIHW_H_ #include #include #include extern u_long atari_mch_cookie; extern u_long atari_mch_type; extern u_long atari_switches; extern int atari_rtc_year_offset; extern int atari_dont_touch_floppy_select; extern int atari_SCC_reset_done; /* convenience macros for testing machine type */ #define MACH_IS_ST ((atari_mch_cookie >> 16) == ATARI_MCH_ST) #define MACH_IS_STE ((atari_mch_cookie >> 16) == ATARI_MCH_STE && \ (atari_mch_cookie & 0xffff) == 0) #define MACH_IS_MSTE ((atari_mch_cookie >> 16) == ATARI_MCH_STE && \ (atari_mch_cookie & 0xffff) == 0x10) #define MACH_IS_TT ((atari_mch_cookie >> 16) == ATARI_MCH_TT) #define MACH_IS_FALCON ((atari_mch_cookie >> 16) == ATARI_MCH_FALCON) #define MACH_IS_MEDUSA (atari_mch_type == ATARI_MACH_MEDUSA) #define MACH_IS_AB40 (atari_mch_type == ATARI_MACH_AB40) /* values for atari_switches */ #define ATARI_SWITCH_IKBD 0x01 #define ATARI_SWITCH_MIDI 0x02 #define ATARI_SWITCH_SND6 0x04 #define ATARI_SWITCH_SND7 0x08 #define ATARI_SWITCH_OVSC_SHIFT 16 #define ATARI_SWITCH_OVSC_IKBD (ATARI_SWITCH_IKBD << ATARI_SWITCH_OVSC_SHIFT) #define ATARI_SWITCH_OVSC_MIDI (ATARI_SWITCH_MIDI << ATARI_SWITCH_OVSC_SHIFT) #define ATARI_SWITCH_OVSC_SND6 (ATARI_SWITCH_SND6 << ATARI_SWITCH_OVSC_SHIFT) #define ATARI_SWITCH_OVSC_SND7 (ATARI_SWITCH_SND7 << ATARI_SWITCH_OVSC_SHIFT) #define ATARI_SWITCH_OVSC_MASK 0xffff0000 /* * Define several Hardware-Chips for indication so that for the ATARI we do * no longer decide whether it is a Falcon or other machine . It's just * important what hardware the machine uses */ /* ++roman 08/08/95: rewritten from ORing constants to a C bitfield */ #define ATARIHW_DECLARE(name) unsigned name : 1 #define ATARIHW_SET(name) (atari_hw_present.name = 1) #define ATARIHW_PRESENT(name) (atari_hw_present.name) struct atari_hw_present { /* video hardware */ ATARIHW_DECLARE(STND_SHIFTER); /* ST-Shifter - no base low ! */ ATARIHW_DECLARE(EXTD_SHIFTER); /* STe-Shifter - 24 bit address */ ATARIHW_DECLARE(TT_SHIFTER); /* TT-Shifter */ ATARIHW_DECLARE(VIDEL_SHIFTER); /* Falcon-Shifter */ /* sound hardware */ ATARIHW_DECLARE(YM_2149); /* Yamaha YM 2149 */ ATARIHW_DECLARE(PCM_8BIT); /* PCM-Sound in STe-ATARI */ ATARIHW_DECLARE(CODEC); /* CODEC Sound (Falcon) */ /* disk storage interfaces */ ATARIHW_DECLARE(TT_SCSI); /* Directly mapped NCR5380 */ ATARIHW_DECLARE(ST_SCSI); /* NCR5380 via ST-DMA (Falcon) */ ATARIHW_DECLARE(ACSI); /* Standard ACSI like in STs */ ATARIHW_DECLARE(IDE); /* IDE Interface */ ATARIHW_DECLARE(FDCSPEED); /* 8/16 MHz switch for FDC */ /* other I/O hardware */ ATARIHW_DECLARE(ST_MFP); /* The ST-MFP (there should be no Atari without it... but who knows?) */ ATARIHW_DECLARE(TT_MFP); /* 2nd MFP */ ATARIHW_DECLARE(SCC); /* Serial Communications Contr. */ ATARIHW_DECLARE(ST_ESCC); /* SCC Z83230 in an ST */ ATARIHW_DECLARE(ANALOG_JOY); /* Paddle Interface for STe and Falcon */ ATARIHW_DECLARE(MICROWIRE); /* Microwire Interface */ /* DMA */ ATARIHW_DECLARE(STND_DMA); /* 24 Bit limited ST-DMA */ ATARIHW_DECLARE(EXTD_DMA); /* 32 Bit ST-DMA */ ATARIHW_DECLARE(SCSI_DMA); /* DMA for the NCR5380 */ ATARIHW_DECLARE(SCC_DMA); /* DMA for the SCC */ /* real time clocks */ ATARIHW_DECLARE(TT_CLK); /* TT compatible clock chip */ ATARIHW_DECLARE(MSTE_CLK); /* Mega ST(E) clock chip */ /* supporting hardware */ ATARIHW_DECLARE(SCU); /* System Control Unit */ ATARIHW_DECLARE(BLITTER); /* Blitter */ ATARIHW_DECLARE(VME); /* VME Bus */ ATARIHW_DECLARE(DSP56K); /* DSP56k processor in Falcon */ }; extern struct atari_hw_present atari_hw_present; /* Reading the MFP port register gives a machine independent delay, since the * MFP always has a 8 MHz clock. This avoids problems with the varying length * of nops on various machines. Somebody claimed that the tstb takes 600 ns. */ #define MFPDELAY() \ __asm__ __volatile__ ( "tstb %0" : : "m" (st_mfp.par_dt_reg) : "cc" ); /* Do cache push/invalidate for DMA read/write. This function obeys the * snooping on some machines (Medusa) and processors: The Medusa itself can * snoop, but only the '040 can source data from its cache to DMA writes i.e., * reads from memory). Both '040 and '060 invalidate cache entries on snooped * DMA reads (i.e., writes to memory). */ #define atari_readb raw_inb #define atari_writeb raw_outb #define atari_inb_p raw_inb #define atari_outb_p raw_outb #include #include static inline void dma_cache_maintenance( unsigned long paddr, unsigned long len, int writeflag ) { if (writeflag) { if (!MACH_IS_MEDUSA || CPU_IS_060) cache_push( paddr, len ); } else { if (!MACH_IS_MEDUSA) cache_clear( paddr, len ); } } /* ** Shifter */ #define ST_LOW 0 #define ST_MID 1 #define ST_HIGH 2 #define TT_LOW 7 #define TT_MID 4 #define TT_HIGH 6 #define SHF_BAS (0xffff8200) struct SHIFTER { u_char pad1; u_char bas_hi; u_char pad2; u_char bas_md; u_char pad3; u_char volatile vcounthi; u_char pad4; u_char volatile vcountmid; u_char pad5; u_char volatile vcountlow; u_char volatile syncmode; u_char pad6; u_char pad7; u_char bas_lo; }; # define shifter ((*(volatile struct SHIFTER *)SHF_BAS)) #define SHF_FBAS (0xffff820e) struct SHIFTER_F030 { u_short off_next; u_short scn_width; }; # define shifter_f030 ((*(volatile struct SHIFTER_F030 *)SHF_FBAS)) #define SHF_TBAS (0xffff8200) struct SHIFTER_TT { u_char char_dummy0; u_char bas_hi; /* video mem base addr, high and mid byte */ u_char char_dummy1; u_char bas_md; u_char char_dummy2; u_char vcount_hi; /* pointer to currently displayed byte */ u_char char_dummy3; u_char vcount_md; u_char char_dummy4; u_char vcount_lo; u_short st_sync; /* ST compatible sync mode register, unused */ u_char char_dummy5; u_char bas_lo; /* video mem addr, low byte */ u_char char_dummy6[2+3*16]; /* $ffff8240: */ u_short color_reg[16]; /* 16 color registers */ u_char st_shiftmode; /* ST compatible shift mode register, unused */ u_char char_dummy7; u_short tt_shiftmode; /* TT shift mode register */ }; #define shifter_tt ((*(volatile struct SHIFTER_TT *)SHF_TBAS)) /* values for shifter_tt->tt_shiftmode */ #define TT_SHIFTER_STLOW 0x0000 #define TT_SHIFTER_STMID 0x0100 #define TT_SHIFTER_STHIGH 0x0200 #define TT_SHIFTER_TTLOW 0x0700 #define TT_SHIFTER_TTMID 0x0400 #define TT_SHIFTER_TTHIGH 0x0600 #define TT_SHIFTER_MODEMASK 0x0700 #define TT_SHIFTER_NUMMODE 0x0008 #define TT_SHIFTER_PALETTE_MASK 0x000f #define TT_SHIFTER_GRAYMODE 0x1000 /* 256 TT palette registers */ #define TT_PALETTE_BASE (0xffff8400) #define tt_palette ((volatile u_short *)TT_PALETTE_BASE) #define TT_PALETTE_RED_MASK 0x0f00 #define TT_PALETTE_GREEN_MASK 0x00f0 #define TT_PALETTE_BLUE_MASK 0x000f /* ** Falcon030 VIDEL Video Controller ** for description see File 'linux\tools\atari\hardware.txt */ #define f030_col ((u_long *) 0xffff9800) #define f030_xreg ((u_short*) 0xffff8282) #define f030_yreg ((u_short*) 0xffff82a2) #define f030_creg ((u_short*) 0xffff82c0) #define f030_sreg ((u_short*) 0xffff8260) #define f030_mreg ((u_short*) 0xffff820a) #define f030_linewidth ((u_short*) 0xffff820e) #define f030_hscroll ((u_char*) 0xffff8265) #define VIDEL_BAS (0xffff8260) struct VIDEL { u_short st_shift; u_short pad1; u_char xoffset_s; u_char xoffset; u_short f_shift; u_char pad2[0x1a]; u_short hht; u_short hbb; u_short hbe; u_short hdb; u_short hde; u_short hss; u_char pad3[0x14]; u_short vft; u_short vbb; u_short vbe; u_short vdb; u_short vde; u_short vss; u_char pad4[0x12]; u_short control; u_short mode; }; #define videl ((*(volatile struct VIDEL *)VIDEL_BAS)) /* ** DMA/WD1772 Disk Controller */ #define FWD_BAS (0xffff8604) struct DMA_WD { u_short fdc_acces_seccount; u_short dma_mode_status; u_char dma_vhi; /* Some extended ST-DMAs can handle 32 bit addresses */ u_char dma_hi; u_char char_dummy2; u_char dma_md; u_char char_dummy3; u_char dma_lo; u_short fdc_speed; }; # define dma_wd ((*(volatile struct DMA_WD *)FWD_BAS)) /* alias */ #define st_dma dma_wd /* The two highest bytes of an extended DMA as a short; this is a must * for the Medusa. */ #define st_dma_ext_dmahi (*((volatile unsigned short *)0xffff8608)) /* ** YM2149 Sound Chip ** access in bytes */ #define YM_BAS (0xffff8800) struct SOUND_YM { u_char rd_data_reg_sel; u_char char_dummy1; u_char wd_data; }; #define sound_ym ((*(volatile struct SOUND_YM *)YM_BAS)) /* TT SCSI DMA */ #define TT_SCSI_DMA_BAS (0xffff8700) struct TT_DMA { u_char char_dummy0; u_char dma_addr_hi; u_char char_dummy1; u_char dma_addr_hmd; u_char char_dummy2; u_char dma_addr_lmd; u_char char_dummy3; u_char dma_addr_lo; u_char char_dummy4; u_char dma_cnt_hi; u_char char_dummy5; u_char dma_cnt_hmd; u_char char_dummy6; u_char dma_cnt_lmd; u_char char_dummy7; u_char dma_cnt_lo; u_long dma_restdata; u_short dma_ctrl; }; #define tt_scsi_dma ((*(volatile struct TT_DMA *)TT_SCSI_DMA_BAS)) /* TT SCSI Controller 5380 */ #define TT_5380_BAS (0xffff8781) struct TT_5380 { u_char scsi_data; u_char char_dummy1; u_char scsi_icr; u_char char_dummy2; u_char scsi_mode; u_char char_dummy3; u_char scsi_tcr; u_char char_dummy4; u_char scsi_idstat; u_char char_dummy5; u_char scsi_dmastat; u_char char_dummy6; u_char scsi_targrcv; u_char char_dummy7; u_char scsi_inircv; }; #define tt_scsi ((*(volatile struct TT_5380 *)TT_5380_BAS)) #define tt_scsi_regp ((volatile char *)TT_5380_BAS) /* ** Falcon DMA Sound Subsystem */ #define MATRIX_BASE (0xffff8930) struct MATRIX { u_short source; u_short destination;