/* * Miscellaneous IOCTL commands for Dynamic Power Management Controller Driver * * Copyright (C) 2004-2009 Analog Device Inc. * * Licensed under the GPL-2 */ #ifndef _BLACKFIN_DPMC_H_ #define _BLACKFIN_DPMC_H_ #ifdef __ASSEMBLY__ #define PM_REG0 R7 #define PM_REG1 R6 #define PM_REG2 R5 #define PM_REG3 R4 #define PM_REG4 R3 #define PM_REG5 R2 #define PM_REG6 R1 #define PM_REG7 R0 #define PM_REG8 P5 #define PM_REG9 P4 #define PM_REG10 P3 #define PM_REG11 P2 #define PM_REG12 P1 #define PM_REG13 P0 #define PM_REGSET0 R7:7 #define PM_REGSET1 R7:6 #define PM_REGSET2 R7:5 #define PM_REGSET3 R7:4 #define PM_REGSET4 R7:3 #define PM_REGSET5 R7:2 #define PM_REGSET6 R7:1 #define PM_REGSET7 R7:0 #define PM_REGSET8 R7:0, P5:5 #define PM_REGSET9 R7:0, P5:4 #define PM_REGSET10 R7:0, P5:3 #define PM_REGSET11 R7:0, P5:2 #define PM_REGSET12 R7:0, P5:1 #define PM_REGSET13 R7:0, P5:0 #define _PM_PUSH(n, x, w, base) PM_REG##n = w[FP + ((x) - (base))]; #define _PM_POP(n, x, w, base) w[FP + ((x) - (base))] = PM_REG##n; #define PM_PUSH_SYNC(n) [--sp] = (PM_REGSET##n); #define PM_POP_SYNC(n) (PM_REGSET##n) = [sp++]; #define PM_PUSH(n, x) PM_REG##n = [FP++]; #define PM_POP(n, x) [FP--] = PM_REG##n; #define PM_CORE_PUSH(n, x) _PM_PUSH(n, x, , COREMMR_BASE) #define PM_CORE_POP(n, x) _PM_POP(n, x, , COREMMR_BASE) #define PM_SYS_PUSH(n, x) _PM_PUSH(n, x, , SYSMMR_BASE) #define PM_SYS_POP(n, x) _PM_POP(n, x, , SYSMMR_BASE) #define PM_SYS_PUSH16(n, x) _PM_PUSH(n, x, w, SYSMMR_BASE) #define PM_SYS_POP16(n, x) _PM_POP(n, x, w, SYSMMR_BASE) .macro bfin_init_pm_bench_cycles #ifdef CONFIG_BFIN_PM_WAKEUP_TIME_BENCH R4 = 0; CYCLES = R4; CYCLES2 = R4; R4 = SYSCFG; BITSET(R4, 1); SYSCFG = R4; #endif .endm .macro bfin_cpu_reg_save /* * Save the core regs early so we can blow them away when * saving/restoring MMR states */ [--sp] = (R7:0, P5:0); [--sp] = fp; [--sp] = usp; [--sp] = i0; [--sp] = i1; [--sp] = i2; [--sp] = i3; [--sp] = m0; [--sp] = m1; [--sp] = m2; [--sp] = m3; [--sp] = l0; [--sp] = l1; [--sp] = l2; [--sp] = l3; [--sp] = b0; [--sp] = b1; [--sp] = b2; [--sp] = b3; [--sp] = a0.x; [--sp] = a0.w; [--sp] = a1.x; [--sp] = a1.w; [--sp] = LC0; [--sp] = LC1; [--sp] = LT0; [--sp] = LT1; [--sp] = LB0; [--sp] = LB1; /* We can't push RETI directly as that'll change IPEND[4] */ r7 = RETI; [--sp] = RETS; [--sp] = ASTAT; #ifndef CONFIG_BFIN_PM_WAKEUP_TIME_BENCH [--sp] = CYCLES; [--sp] = CYCLES2; #endif [--sp] = SYSCFG; [--sp] = RETX; [--sp] = SEQSTAT; [--sp] = r7; /* Save first func arg in M3 */ M3 = R0; .endm .macro bfin_cpu_reg_restore /* Restore Core Registers */ RETI = [sp++]; SEQSTAT = [sp++]; RETX = [sp++]; SYSCFG = [sp++]; #ifndef CONFIG_BFIN_PM_WAKEUP_TIME_BENCH CYCLES2 = [sp++]; CYCLES = [sp++]; #endif ASTAT = [sp++]; RETS = [sp++]; LB1 = [sp++]; LB0 = [sp++]; LT1 = [sp++]; LT0 = [sp++]; LC1 = [sp++]; LC0 = [sp++]; a1.w = [sp++]; a1.x = [sp++]; a0.w = [sp++]; a0.x = [sp++]; b3 = [sp++]; b2 = [sp++]; b1 = [sp++]; b0 = [sp++]; l3 = [sp++]; l2 = [sp++]; l1 = [sp++]; l0 = [sp++]; m3 = [sp++]; m2 = [sp++]; m1 = [sp++]; m0 = [sp++]; i3 = [sp++]; i2 = [sp++]; i1 = [sp++]; i0 = [sp++]; usp = [sp++]; fp = [sp++]; (R7:0, P5:0) = [sp++]; .endm .macro bfin_sys_mmr_save /* Save system MMRs */ FP.H = hi(SYSMMR_BASE); FP.L = lo(SYSMMR_BASE); #ifdef SIC_IMASK0 PM_SYS_PUSH(0, SIC_IMASK0) PM_SYS_PUSH(1, SIC_IMASK1) # ifdef SIC_IMASK2 PM_SYS_PUSH(2, SIC_IMASK2) # endif #else # ifdef SIC_IMASK PM_SYS_PUSH(0, SIC_IMASK) # endif #endif #ifdef SIC_IAR0 PM_SYS_PUSH(3, SIC_IAR0) PM_SYS_PUSH(4, SIC_IAR1) PM_SYS_PUSH(5, SIC_IAR2) #endif #ifdef SIC_IAR3 PM_SYS_PUSH(6, SIC_IAR3) #endif #ifdef SIC_IAR4 PM_SYS_PUSH(7, SIC_IAR4) PM_SYS_PUSH(8, SIC_IAR5) PM_SYS_PUSH(9, SIC_IAR6) #endif #ifdef SIC_IAR7 PM_SYS_PUSH(10, SIC_IAR7) #endif #ifdef SIC_IAR8 PM_SYS_PUSH(11, SIC_IAR8) PM_SYS_PUSH(12, SIC_IAR9) PM_SYS_PUSH(13, SIC_IAR10) #endif PM_PUSH_SYNC(13) #ifdef SIC_IAR11 PM_SYS_PUSH(0, SIC_IAR11) #endif #ifdef SIC_IWR PM_SYS_PUSH(1, SIC_IWR) #endif #ifdef SIC_IWR0 PM_SYS_PUSH(1, SIC_IWR0) #endif #ifdef SIC_IWR1 PM_SYS_PUSH(2, SIC_IWR1) #endif #ifdef SIC_IWR2 PM_SYS_PUSH(3, SIC_IWR2) #endif #ifdef PINT0_ASSIGN PM_SYS_PUSH(4, PINT0_MASK_SET) PM_SYS_PUSH(5, PINT1_MASK_SET) PM_SYS_PUSH(6, PINT2_MASK_SET) PM_SYS_PUSH(7, PINT3_MASK_SET) PM_SYS_PUSH(8, PINT0_ASSIGN) PM_SYS_PUSH(9, PINT1_ASSIGN) PM_SYS_PUSH(10, PINT2_ASSIGN) PM_SYS_PUSH(11, PINT3_ASSIGN) PM_SYS_PUSH(12, PINT0_INVERT_SET) PM_SYS_PUSH(13, PINT1_INVERT_SET) PM_PUSH_SYNC(13) PM_SYS_PUSH(0, PINT2_INVERT_SET) PM_SYS_PUSH(1, PINT3_INVERT_SET) PM_SYS_PUSH(2, PINT0_EDGE_SET) PM_SYS_PUSH(3, PINT1_EDGE_SET) PM_SYS_PUSH(4, PINT2_EDGE_SET) PM_SYS_PUSH(5, PINT3_EDGE_SET) #endif #ifdef SYSCR PM_SYS_PUSH16(6, SYSCR) #endif #ifdef EBIU_AMGCTL PM_SYS_PUSH16(7, EBIU_AMGCTL) PM_SYS_PUSH(8, EBIU_AMBCTL0) PM_SYS_PUSH(9, EBIU_AMBCTL1) #endif #ifdef EBIU_FCTL PM_SYS_PUSH(10, EBIU_MBSCTL) PM_SYS_PUSH(11, EBIU_MODE) PM_SYS_PUSH(12, EBIU_FCTL) PM_PUSH_SYNC(12) #else PM_PUSH_SYNC(9) #endif .endm .macro bfin_sys_mmr_restore /* Restore System MMRs */ FP.H = hi(SYSMMR_BASE); FP.L = lo(SYSMMR_BASE); #ifdef EBIU_FCTL PM_POP_SYNC(12) PM_SYS_POP(12, EBIU_FCTL) PM_SYS_POP(11, EBIU_MODE) PM_SYS_POP(10, EBIU_MBSCTL) #else PM_POP_SYNC(9) #endif #ifdef EBIU_AMGCTL PM_SYS_POP(9, EBIU_AMBCTL1) PM_SYS_POP(8, EBIU_AMBCTL0) PM_SYS_POP16(7, EBIU_AMGCTL) #endif #ifdef SYSCR PM_SYS_POP16(6, SYSCR) #endif #ifdef PINT0_ASSIGN PM_SYS_POP(5, PINT3_EDGE_SET) PM_SYS_POP(4, PINT2_EDGE_SET) PM_SYS_POP(3, PINT1_EDGE_SET) PM_SYS_POP(2, PINT0_EDGE_SET) PM_SYS_POP(1, PINT3_INVERT_SET) PM_SYS_POP(0, PINT2_INVERT_SET) PM_POP_SYNC(13) PM_SYS_POP(13, PINT1_INVERT_SET) PM_SYS_POP(12, PINT0_INVERT_SET) PM_SYS_POP(11, PINT3_ASSIGN) PM_SYS_POP(10, PINT2_ASSIGN) PM_SYS_POP(9, PINT1_ASSIGN) PM_SYS_POP(8, PINT0_ASSIGN) PM_SYS_POP(7, PINT3_MASK_SET) PM_SYS_POP(6, PINT2_MASK_SET) PM_SYS_POP(5, PINT1_MASK_SET) PM_SYS_POP(4, PINT0_MASK_SET) #endif #ifdef SIC_IWR2 PM_SYS_POP(3, SIC_IWR2) #endif #ifdef SIC_IWR1 PM_SYS_POP(2, SIC_IWR1) #endif #ifdef SIC_IWR0 PM_SYS_POP(1, SIC_IWR0) #endif #ifdef SIC_IWR PM_SYS_POP(1, SIC_IWR) #endif #ifdef SIC_IAR11 PM_SYS_POP(0, SIC_IAR11) #endif PM_POP_SYNC(13) #ifdef SIC_IAR8 PM_SYS_POP(13, SIC_IAR10) PM_SYS_POP(12, SIC_IAR9) PM_SYS_POP(11, SIC_IAR8) #endif #ifdef SIC_IAR7 PM_SYS_POP(10, SIC_IAR7) #endif #ifdef SIC_IAR6 PM_SYS_POP(9, SIC_IAR6) PM_SYS_POP(8, SIC_IAR5) PM_SYS_POP(7, SIC_IAR4) #endif #ifdef SIC_IAR3 PM_SYS_POP(6, SIC_IAR3) #endif #ifdef SIC_IAR0 PM_SYS_POP(5, SIC_IAR2) PM_SYS_POP(4, SIC_IAR1) PM_SYS_POP(3, SIC_IAR0) #endif #ifdef SIC_IMASK0 # ifdef SIC_IMASK2 PM_SYS_POP(2, SIC_IMASK2) # endif PM_SYS_POP(1, SIC_IMASK1) PM_SYS_POP(0, SIC_IMASK0) #else # ifdef SIC_IMASK PM_SYS_POP(0, SIC_IMASK) # endif #endif .endm .macro bfin_core_mmr_save /* Save Core MMRs */ I0.H = hi(COREMMR_BASE); I0.L = lo(COREMMR_BASE); I1 = I0; I2 = I0; I3 = I0; B0 = I0; B1 = I0; B2 = I0;