/* * arch/arm/mach-orion5x/net2big-setup.c * * LaCie 2Big Network NAS setup * * Copyright (C) 2009 Simon Guinot * * This file is licensed under the terms of the GNU General Public * License version 2. This program is licensed "as is" without any * warranty of any kind, whether express or implied. */ #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include "common.h" #include "mpp.h" /***************************************************************************** * LaCie 2Big Network Info ****************************************************************************/ /* * 512KB NOR flash Device bus boot chip select */ #define NET2BIG_NOR_BOOT_BASE 0xfff80000 #define NET2BIG_NOR_BOOT_SIZE SZ_512K /***************************************************************************** * 512KB NOR Flash on Boot Device ****************************************************************************/ /* * TODO: Check write support on flash MX29LV400CBTC-70G */ static struct mtd_partition net2big_partitions[] = { { .name = "Full512kb", .size = MTDPART_SIZ_FULL, .offset = 0x00000000, .mask_flags = MTD_WRITEABLE, }, }; static struct physmap_flash_data net2big_nor_flash_data = { .width = 1, .parts = net2big_partitions, .nr_parts = ARRAY_SIZE(net2big_partitions), }; static struct resource net2big_nor_flash_resource = { .flags = IORESOURCE_MEM, .start = NET2BIG_NOR_BOOT_BASE, .end = NET2BIG_NOR_BOOT_BASE + NET2BIG_NOR_BOOT_SIZE - 1, }; static struct platform_device net2big_nor_flash = { .name = "physmap-flash", .id = 0, .dev = { .platform_data = &net2big_nor_flash_data, }, .num_resources = 1, .resource = &net2big_nor_flash_resource, }; /***************************************************************************** * Ethernet ****************************************************************************/ static struct mv643xx_eth_platform_data net2big_eth_data = { .phy_addr = MV643XX_ETH_PHY_ADDR(8), }; /***************************************************************************** * I2C devices ****************************************************************************/ /* * i2c addr | chip | description * 0x32 | Ricoh 5C372b | RTC * 0x50 | HT24LC08 | eeprom (1kB) */ static struct i2c_board_info __initdata net2big_i2c_devices[] = { { I2C_BOARD_INFO("rs5c372b", 0x32), }, { I2C_BOARD_INFO("24c08", 0x50), }, }; /***************************************************************************** * SATA ****************************************************************************/ static struct mv_sata_platform_data net2big_sata_data = { .n_ports = 2, }; #define NET2BIG_GPIO_SATA_POWER_REQ 19 #define NET2BIG_GPIO_SATA0_POWER 23 #define NET2BIG_GPIO_SATA1_POWER 25 static void __init net2big_sata_power_init(void) { int err; /* Configure GPIOs over MPP max number. */ orion_gpio_set_valid(NET2BIG_GPIO_SATA0_POWER, 1); orion_gpio_set_valid(NET2BIG_GPIO_SATA1_POWER, 1); err = gpio_request(NET2BIG_GPIO_SATA0_POWER, "SATA0 power status"); if (err == 0) { err = gpio_direction_input(NET2BIG_GPIO_SATA0_POWER); if (err) gpio_free(NET2BIG_GPIO_SATA0_POWER); } if (err) { pr_err("net2big: failed to setup SATA0 power GPIO\n"); return; } err = gpio_request(NET2BIG_GPIO_SATA1_POWER, "SATA1 power status"); if (err == 0) { err = gpio_direction_input(NET2BIG_GPIO_SATA1_POWER); if (err) gpio_free(NET2BIG_GPIO_SATA1_POWER); } if (err) { pr_err("net2big: failed to setup SATA1 power GPIO\n"); goto err_free_1; } err = gpio_request(NET2BIG_GPIO_SATA_POWER_REQ, "SATA power request"); if (err == 0) { err = gpio_direction_output(NET2BIG_GPIO_SATA_POWER_REQ, 0); if (err) gpio_free(NET2BIG_GPIO_SATA_POWER_REQ); } if (err) { pr_err("net2big: failed to setup SATA power request GPIO\n"); goto err_free_2; } if (gpio_get_value(NET2BIG_GPIO_SATA0_POWER) && gpio_get_value(NET2BIG_GPIO_SATA1_POWER)) { return; } /* * SATA power up on both disk is done by pulling high the CPLD power * request line. The 300ms delay is related to the CPLD clock and is * needed to be sure that the CPLD has take into account the low line * status. */ msleep(300); gpio_set_value(NET2BIG_GPIO_SATA_POWER_REQ, 1); pr_info("net2big: power up SATA hard disks\n"); return; err_free_2: gpio_free(NET2BIG_GPIO_SATA1_POWER); err_free_1: gpio_free(NET2BIG_GPIO_SATA0_POWER); return; } /***************************************************************************** * GPIO LEDs ****************************************************************************/ /* * The power front LEDs (blue and red) and SATA red LEDs are controlled via a * single GPIO line and are compatible with the leds-gpio driver. * * The SATA blue LEDs have some hardware blink capabilities which are detailed * in the following array: * * SATAx blue LED | SATAx activity | LED state * | | * 0 | 0 | blink (rate 300ms) * 1 | 0 | off * ? | 1 | on * * Notes: The blue and the red front LED's can't be on at the same time. * Blue LED have priority. */ #define NET2BIG_GPIO_PWR_RED_LED 6 #define NET2BIG_GPIO_PWR_BLUE_LED 16 #define NET2BIG_GPIO_PWR_LED_BLINK_STOP 7 #define NET2BIG_GPIO_SATA0_RED_LED 11 #define NET2BIG_GPIO_SATA1_RED_LED 10 #define NET2BIG_GPIO_SATA0_BLUE_LED 17 #define NET2BIG_GPIO_SATA1_BLUE_LED 13 static struct gpio_led net2big_leds[] = { { .name = "net2big:red:power", .gpio = NET2BIG_GPIO_PWR_RED_LED, }, { .name = "net2big:blue:power", .gpio = NET2BIG_GPIO_PWR_BLUE_LED, }, { .name = "net2big:red:sata0", .gpio = NET2BIG_GPIO_SATA0_RED_LED, }, { .name = "net2big:red:sata1", .gpio = NET2BIG_GPIO_SATA1_RED_LED, }, }; static struct gpio_led_platform_data net2big_led_data = { .num_leds = ARRAY_SIZE(net2big_leds), .leds = net2big_leds, }; static struct platform_device net2big_gpio_leds = { .name = "leds-gpio", .id = -1,