/*
 * sh7372 processor support - PFC hardware block
 *
 * Copyright (C) 2010  Kuninori Morimoto <morimoto.kuninori@renesas.com>
 *
 * Based on
 * sh7367 processor support - PFC hardware block
 * Copyright (C) 2010  Magnus Damm
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; version 2 of the License.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
 */
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/sh_pfc.h>
#include <mach/irqs.h>
#include <mach/sh7372.h>

#define CPU_ALL_PORT(fn, pfx, sfx) \
	PORT_10(fn, pfx, sfx),		PORT_90(fn, pfx, sfx), \
	PORT_10(fn, pfx##10, sfx),	PORT_10(fn, pfx##11, sfx), \
	PORT_10(fn, pfx##12, sfx),	PORT_10(fn, pfx##13, sfx), \
	PORT_10(fn, pfx##14, sfx),	PORT_10(fn, pfx##15, sfx), \
	PORT_10(fn, pfx##16, sfx),	PORT_10(fn, pfx##17, sfx), \
	PORT_10(fn, pfx##18, sfx),	PORT_1(fn, pfx##190, sfx)

enum {
	PINMUX_RESERVED = 0,

	/* PORT0_DATA -> PORT190_DATA */
	PINMUX_DATA_BEGIN,
	PORT_ALL(DATA),
	PINMUX_DATA_END,

	/* PORT0_IN -> PORT190_IN */
	PINMUX_INPUT_BEGIN,
	PORT_ALL(IN),
	PINMUX_INPUT_END,

	/* PORT0_IN_PU -> PORT190_IN_PU */
	PINMUX_INPUT_PULLUP_BEGIN,
	PORT_ALL(IN_PU),
	PINMUX_INPUT_PULLUP_END,

	/* PORT0_IN_PD -> PORT190_IN_PD */
	PINMUX_INPUT_PULLDOWN_BEGIN,
	PORT_ALL(IN_PD),
	PINMUX_INPUT_PULLDOWN_END,

	/* PORT0_OUT -> PORT190_OUT */
	PINMUX_OUTPUT_BEGIN,
	PORT_ALL(OUT),
	PINMUX_OUTPUT_END,

	PINMUX_FUNCTION_BEGIN,
	PORT_ALL(FN_IN),	/* PORT0_FN_IN	-> PORT190_FN_IN */
	PORT_ALL(FN_OUT),	/* PORT0_FN_OUT	-> PORT190_FN_OUT */
	PORT_ALL(FN0),		/* PORT0_FN0	-> PORT190_FN0 */
	PORT_ALL(FN1),		/* PORT0_FN1	-> PORT190_FN1 */
	PORT_ALL(FN2),		/* PORT0_FN2	-> PORT190_FN2 */
	PORT_ALL(FN3),		/* PORT0_FN3	-> PORT190_FN3 */
	PORT_ALL(FN4),		/* PORT0_FN4	-> PORT190_FN4 */
	PORT_ALL(FN5),		/* PORT0_FN5	-> PORT190_FN5 */
	PORT_ALL(FN6),		/* PORT0_FN6	-> PORT190_FN6 */
	PORT_ALL(FN7),		/* PORT0_FN7	-> PORT190_FN7 */

	MSEL1CR_31_0,	MSEL1CR_31_1,
	MSEL1CR_30_0,	MSEL1CR_30_1,
	MSEL1CR_29_0,	MSEL1CR_29_1,
	MSEL1CR_28_0,	MSEL1CR_28_1,
	MSEL1CR_27_0,	MSEL1CR_27_1,
	MSEL1CR_26_0,	MSEL1CR_26_1,
	MSEL1CR_16_0,	MSEL1CR_16_1,
	MSEL1CR_15_0,	MSEL1CR_15_1,
	MSEL1CR_14_0,	MSEL1CR_14_1,
	MSEL1CR_13_0,	MSEL1CR_13_1,
	MSEL1CR_12_0,	MSEL1CR_12_1,
	MSEL1CR_9_0,	MSEL1CR_9_1,
	MSEL1CR_8_0,	MSEL1CR_8_1,
	MSEL1CR_7_0,	MSEL1CR_7_1,
	MSEL1CR_6_0,	MSEL1CR_6_1,
	MSEL1CR_4_0,	MSEL1CR_4_1,
	MSEL1CR_3_0,	MSEL1CR_3_1,
	MSEL1CR_2_0,	MSEL1CR_2_1,
	MSEL1CR_0_0,	MSEL1CR_0_1,

	MSEL3CR_27_0,	MSEL3CR_27_1,
	MSEL3CR_26_0,	MSEL3CR_26_1,
	MSEL3CR_21_0,	MSEL3CR_21_1,
	MSEL3CR_20_0,	MSEL3CR_20_1,
	MSEL3CR_15_0,	MSEL3CR_15_1,
	MSEL3CR_9_0,	MSEL3CR_9_1,
	MSEL3CR_6_0,	MSEL3CR_6_1,

	MSEL4CR_19_0,	MSEL4CR_19_1,
	MSEL4CR_18_0,	MSEL4CR_18_1,
	MSEL4CR_17_0,	MSEL4CR_17_1,
	MSEL4CR_16_0,	MSEL4CR_16_1,
	MSEL4CR_15_0,	MSEL4CR_15_1,
	MSEL4CR_14_0,	MSEL4CR_14_1,
	MSEL4CR_10_0,	MSEL4CR_10_1,
	MSEL4CR_6_0,	MSEL4CR_6_1,
	MSEL4CR_4_0,	MSEL4CR_4_1,
	MSEL4CR_1_0,	MSEL4CR_1_1,
	PINMUX_FUNCTION_END,

	PINMUX_MARK_BEGIN,

	/* IRQ */
	IRQ0_6_MARK,	IRQ0_162_MARK,	IRQ1_MARK,	IRQ2_4_MARK,
	IRQ2_5_MARK,	IRQ3_8_MARK,	IRQ3_16_MARK,	IRQ4_17_MARK,
	IRQ4_163_MARK,	IRQ5_MARK,	IRQ6_39_MARK,	IRQ6_164_MARK,
	IRQ7_40_MARK,	IRQ7_167_MARK,	IRQ8_41_MARK,	IRQ8_168_MARK,
	IRQ9_42_MARK,	IRQ9_169_MARK,	IRQ10_MARK,	IRQ11_MARK,
	IRQ12_80_MARK,	IRQ12_137_MARK,	IRQ13_81_MARK,	IRQ13_145_MARK,
	IRQ14_82_MARK,	IRQ14_146_MARK,	IRQ15_83_MARK,	IRQ15_147_MARK,