/* Speyside modules for Cragganmore - board data probing * * Copyright 2011 Wolfson Microelectronics plc * Mark Brown * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include static struct s3c64xx_spi_csinfo wm0010_spi_csinfo = { .line = S3C64XX_GPC(3), }; static struct wm0010_pdata wm0010_pdata = { .gpio_reset = S3C64XX_GPN(6), .reset_active_high = 1, /* Active high for Glenfarclas Rev 2 */ }; static struct spi_board_info wm1253_devs[] = { [0] = { .modalias = "wm0010", .max_speed_hz = 26 * 1000 * 1000, .bus_num = 0, .chip_select = 0, .mode = SPI_MODE_0, .irq = S3C_EINT(4), .controller_data = &wm0010_spi_csinfo, .platform_data = &wm0010_pdata, }, }; static struct spi_board_info balblair_devs[] = { [0] = { .modalias = "wm0010", .max_speed_hz = 26 * 1000 * 1000, .bus_num = 0, .chip_select = 0, .mode = SPI_MODE_0, .irq = S3C_EINT(4), .controller_data = &wm0010_spi_csinfo, .platform_data = &wm0010_pdata, }, }; static struct wm5100_pdata wm5100_pdata = { .ldo_ena = S3C64XX_GPN(7), .irq_flags = IRQF_TRIGGER_HIGH, .gpio_base = CODEC_GPIO_BASE, .in_mode = { WM5100_IN_DIFF, WM5100_IN_DIFF, WM5100_IN_DIFF, WM5100_IN_SE, }, .hp_pol = CODEC_GPIO_BASE + 3, .jack_modes = { { WM5100_MICDET_MICBIAS3, 0, 0 }, { WM5100_MICDET_MICBIAS2, 1, 1 }, }, .gpio_defaults = { 0, 0, 0, 0, 0x2, /* IRQ: CMOS output */ 0x3, /* CLKOUT: CMOS output */ }, }; static struct wm8996_retune_mobile_config wm8996_retune[] = { { .name = "Sub LPF", .rate = 48000, .regs = { 0x6318, 0x6300, 0x1000, 0x0000, 0x0004, 0x2000, 0xF000, 0x0000, 0x0004, 0x2000, 0xF000, 0x0000, 0x0004, 0x2000, 0xF000, 0x0000, 0x0004, 0x1000, 0x0800, 0x4000 }, }, { .name = "Sub HPF", .rate = 48000, .regs = { 0x000A, 0x6300, 0x1000, 0x0000, 0x0004, 0x2000, 0xF000, 0x0000, 0x0004, 0x2000, 0xF000, 0x0000, 0x0004, 0x2000, 0xF000, 0x0000, 0x0004, 0x1000, 0x0800, 0x4000 }, }, }; static struct wm8996_pdata wm8996_pdata __initdata = { .ldo_ena = S3C64XX_GPN(7), .gpio_base = CODEC_GPIO_BASE, .micdet_def = 1, .inl_mode = WM8996_DIFFERRENTIAL_1, .inr_mode = WM8996_DIFFERRENTIAL_1, .irq_flags = IRQF_TRIGGER_RISING, .gpio_default = { 0x8001, /* GPIO1 == ADCLRCLK1 */ 0x8001, /* GPIO2 == ADCLRCLK2, input due to CPU */ 0x0141, /* GPIO3 == HP_SEL */ 0x0002, /* GPIO4 == IRQ */ 0x020e, /* GPIO5 == CLKOUT */ }, .retune_mobile_cfgs = wm8996_retune, .num_retune_mobile_cfgs = ARRAY_SIZE(wm8996_retune), }; static struct wm8962_pdata wm8962_pdata __initdata = { .gpio_init = { 0, WM8962_GPIO_FN_OPCLK, WM8962_GPIO_FN_DMICCLK, 0, 0x8000 | WM8962_GPIO_FN_DMICDAT, WM8962_GPIO_FN_IRQ, /* Open drain mode */ }, .in4_dc_measure = true, }; static struct wm9081_pdata wm9081_pdata __initdata = { .irq_high = false, .irq_cmos = false, }; static const struct i2c_board_info wm1254_devs[] = { { I2C_BOARD_INFO("wm8996", 0x1a), .platform_data = &wm8996_pdata, .irq = GLENFARCLAS_PMIC_IRQ_BASE + WM831X_IRQ_GPIO_2, }, { I2C_BOARD_INFO("wm9081", 0x6c), .platform_data = &wm9081_pdata, }, }; static const struct i2c_board_info wm1255_devs[] = { { I2C_BOARD_INFO("wm5100", 0x1a), .platform_data = &wm5100_pdata, .irq = GLENFARCLAS_PMIC_IRQ_BASE + WM831X_IRQ_GPIO_2, }, { I2C_BOARD_INFO("wm9081", 0x6c), .platform_data = &wm9081_pdata, }, }; static const struct i2c_board_info wm1259_devs[] = { { I2C_BOARD_INFO("wm8962", 0x1a), .platform_data = &wm8962_pdata, .irq = GLENFARCLAS_PMIC_IRQ_BASE + WM831X_IRQ_GPIO_2, }, };