/* * r8a7779 processor support - PFC hardware block * * Copyright (C) 2011 Renesas Solutions Corp. * Copyright (C) 2011 Magnus Damm * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; version 2 of the License. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ #include #include #include #include #include #define CPU_32_PORT(fn, pfx, sfx) \ PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \ PORT_10(fn, pfx##2, sfx), PORT_1(fn, pfx##30, sfx), \ PORT_1(fn, pfx##31, sfx) #define CPU_32_PORT6(fn, pfx, sfx) \ PORT_1(fn, pfx##0, sfx), PORT_1(fn, pfx##1, sfx), \ PORT_1(fn, pfx##2, sfx), PORT_1(fn, pfx##3, sfx), \ PORT_1(fn, pfx##4, sfx), PORT_1(fn, pfx##5, sfx), \ PORT_1(fn, pfx##6, sfx), PORT_1(fn, pfx##7, sfx), \ PORT_1(fn, pfx##8, sfx) #define CPU_ALL_PORT(fn, pfx, sfx) \ CPU_32_PORT(fn, pfx##_0_, sfx), \ CPU_32_PORT(fn, pfx##_1_, sfx), \ CPU_32_PORT(fn, pfx##_2_, sfx), \ CPU_32_PORT(fn, pfx##_3_, sfx), \ CPU_32_PORT(fn, pfx##_4_, sfx), \ CPU_32_PORT(fn, pfx##_5_, sfx), \ CPU_32_PORT6(fn, pfx##_6_, sfx) #define _GP_GPIO(pfx, sfx) PINMUX_GPIO(GPIO_GP##pfx, GP##pfx##_DATA) #define _GP_DATA(pfx, sfx) PINMUX_DATA(GP##pfx##_DATA, GP##pfx##_FN, \ GP##pfx##_IN, GP##pfx##_OUT) #define _GP_INOUTSEL(pfx, sfx) GP##pfx##_IN, GP##pfx##_OUT #define _GP_INDT(pfx, sfx) GP##pfx##_DATA #define GP_ALL(str) CPU_ALL_PORT(_PORT_ALL, GP, str) #define PINMUX_GPIO_GP_ALL() CPU_ALL_PORT(_GP_GPIO, , unused) #define PINMUX_DATA_GP_ALL() CPU_ALL_PORT(_GP_DATA, , unused) #define PORT_10_REV(fn, pfx, sfx) \ PORT_1(fn, pfx##9, sfx), PORT_1(fn, pfx##8, sfx), \ PORT_1(fn, pfx##7, sfx), PORT_1(fn, pfx##6, sfx), \ PORT_1(fn, pfx##5, sfx), PORT_1(fn, pfx##4, sfx), \ PORT_1(fn, pfx##3, sfx), PORT_1(fn, pfx##2, sfx), \ PORT_1(fn, pfx##1, sfx), PORT_1(fn, pfx##0, sfx) #define CPU_32_PORT_REV(fn, pfx, sfx) \ PORT_1(fn, pfx##31, sfx), PORT_1(fn, pfx##30, sfx), \ PORT_10_REV(fn, pfx##2, sfx), PORT_10_REV(fn, pfx##1, sfx), \ PORT_10_REV(fn, pfx, sfx) #define GP_INOUTSEL(bank) CPU_32_PORT_REV(_GP_INOUTSEL, _##bank##_, unused) #define GP_INDT(bank) CPU_32_PORT_REV(_GP_INDT, _##bank##_, unused) #define PINMUX_IPSR_DATA(ipsr, fn) PINMUX_DATA(fn##_MARK, FN_##ipsr, FN_##fn) #define PINMUX_IPSR_MODSEL_DATA(ipsr, fn, ms) PINMUX_DATA(fn##_MARK, FN_##ms, \ FN_##ipsr, FN_##fn) enum { PINMUX_RESERVED = 0, PINMUX_DATA_BEGIN, GP_ALL(DATA), /* GP_0_0_DATA -> GP_6_8_DATA */ PINMUX_DATA_END, PINMUX_INPUT_BEGIN, GP_ALL(IN), /* GP_0_0_IN -> GP_6_8_IN */ PINMUX_INPUT_END, PINMUX_OUTPUT_BEGIN, GP_ALL(OUT), /* GP_0_0_OUT -> GP_6_8_OUT */ PINMUX_OUTPUT_END, PINMUX_FUNCTION_BEGIN, GP_ALL(FN), /* GP_0_0_FN -> GP_6_8_FN */ /* GPSR0 */ FN_AVS1, FN_AVS2, FN_IP0_7_6, FN_A17, FN_A18, FN_A19, FN_IP0_9_8, FN_IP0_11_10, FN_IP0_13_12, FN_IP0_15_14, FN_IP0_18_16, FN_IP0_22_19, FN_IP0_24_23, FN_IP0_25, FN_IP0_27_26, FN_IP1_1_0, FN_IP1_3_2, FN_IP1_6_4, FN_IP1_10_7, FN_IP1_14_11, FN_IP1_18_15, FN_IP0_5_3, FN_IP0_30_28, FN_IP2_18_16, FN_IP2_21_19, FN_IP2_30_28, FN_IP3_2_0, FN_IP3_11_9, FN_IP3_14_12, FN_IP3_22_21, FN_IP3_26_24, FN_IP3_31_29, /* GPSR1 */ FN_IP4_1_0, FN_IP4_4_2, FN_IP4_7_5, FN_IP4_10_8, FN_IP4_11, FN_IP4_12, FN_IP4_13, FN_IP4_14, FN_IP4_15, FN_IP4_16, FN_IP4_19_17, FN_IP4_22_20, FN_IP4_23, FN_IP4_24, FN_IP4_25, FN_IP4_26, FN_IP4_27, FN_IP4_28, FN_IP4_31_29, FN_IP5_2_0, FN_IP5_3, FN_IP5_4, FN_IP5_5, FN_IP5_6, FN_IP5_7, FN_IP5_8, FN_IP5_10_9, FN_IP5_12_11, FN_IP5_14_13, FN_IP5_16_15, FN_IP5_20_17, FN_IP5_23_21, /* GPSR2 */ FN_IP5_27_24, FN_IP8_20, FN_IP8_22_21, FN_IP8_24_23, FN_IP8_27_25, FN_IP8_30_28, FN_IP9_1_0, FN_IP9_3_2, FN_IP9_4, FN_IP9_5, FN_IP9_6, FN_IP9_7, FN_IP9_9_8, FN_IP9_11_10, FN_IP9_13_12, FN_IP9_15_14, FN_IP9_18_16, FN_IP9_21_19, FN_IP9_23_22, FN_IP9_25_24, FN_IP9_27_26, FN_IP9_29_28, FN_IP10_2_0, FN_IP10_5_3, FN_IP10_8_6, FN_IP10_11_9, FN_IP10_14_12, FN_IP10_17_15, FN_IP10_20_18, FN_IP10_23_21, FN_IP10_25_24, FN_IP10_28_26, /* GPSR3 */ FN_IP10_31_29, FN_IP11_2_0, FN_IP11_5_3, FN_IP11_8_6, FN_IP11_11_9, FN_IP11_14_12, FN_IP11_17_15, FN_IP11_20_18, FN_IP11_23_21, FN_IP11_26_24, FN_IP11_29_27, FN_IP12_2_0, FN_IP12_5_3, FN_IP12_8_6, FN_IP12_11_9, FN_IP12_14_12, FN_IP12_17_15, FN_IP7_16_15, FN_IP7_18_17, FN_IP7_28_27, FN_IP7_30_29, FN_IP7_20_19, FN_IP7_22_21, FN_IP7_24_23, FN_IP7_26_25, FN_IP1_20_19, FN_IP1_22_21, FN_IP1_24_23, FN_IP5_28, FN_IP5_30_29, FN_IP6_1_0, FN_IP6_3_2, /* GPSR4 */ FN_IP6_5_4, FN_IP6_7_6, FN_IP6_8, FN_IP6_11_9, FN_IP6_14_12, FN_IP6_17_15, FN_IP6_19_18, FN_IP6_22_20, FN_IP6_24_23, FN_IP6_26_25, FN_IP6_30_29, FN_IP7_1_0, FN_IP7_3_2, FN_IP7_6_4, FN_IP7_9_7, FN_IP7_12_10, FN_IP7_14_13, FN_IP2_7_4, FN_IP2_11_8, FN_IP2_15_12, FN_IP1_28_25, FN_IP2_3_0, FN_IP8_3_0, FN_IP8_7_4, FN_IP8_11_8, FN_IP8_15_12, FN_USB_PENC0, FN_USB_PENC1, FN_IP0_2_0, FN_IP8_17_16, FN_IP8_18, FN_IP8_19, /* GPSR5 */ FN_A1, FN_A2, FN_A3, FN_A4, FN_A5, FN_A6, FN_A7, FN_A8, FN_A9, FN_A10, FN_A11, FN_A12, FN_A13, FN_A14, FN_A15, FN_A16, FN_RD, FN_WE0, FN_WE1, FN_EX_WAIT0, FN_IP3_23, FN_IP3_27, FN_IP3_28, FN_IP2_22, FN_IP2_23, FN_IP2_24, FN_IP2_25, FN_IP2_26, FN_IP2_27, FN_IP3_3, FN_IP3_4, FN_IP3_5,