/*********************************** * $Id: m68360_pram.h,v 1.1 2002/03/02 15:01:07 gerg Exp $ *********************************** * *************************************** * Definitions of the parameter area RAM. * Note that different structures are overlaid * at the same offsets for the different modes * of operation. *************************************** */ #ifndef __PRAM_H #define __PRAM_H /* Time slot assignment table */ #define VALID_SLOT 0x8000 #define WRAP_SLOT 0x4000 /***************************************************************** Global Multichannel parameter RAM *****************************************************************/ struct global_multi_pram { /* * Global Multichannel parameter RAM */ unsigned long mcbase; /* Multichannel Base pointer */ unsigned short qmcstate; /* Multichannel Controller state */ unsigned short mrblr; /* Maximum Receive Buffer Length */ unsigned short tx_s_ptr; /* TSTATx Pointer */ unsigned short rxptr; /* Current Time slot entry in TSATRx */ unsigned short grfthr; /* Global Receive frame threshold */ unsigned short grfcnt; /* Global Receive Frame Count */ unsigned long intbase; /* Multichannel Base address */ unsigned long iintptr; /* Pointer to interrupt queue */ unsigned short rx_s_ptr; /* TSTARx Pointer */ unsigned short txptr; /* Current Time slot entry in TSATTx */ unsigned long c_mask32; /* CRC Constant (debb20e3) */ unsigned short tsatrx[32]; /* Time Slot Assignment Table Rx */ unsigned short tsattx[32]; /* Time Slot Assignment Table Tx */ unsigned short c_mask16; /* CRC Constant (f0b8) */ }; /***************************************************************** Quicc32 HDLC parameter RAM *****************************************************************/ struct quicc32_pram { unsigned short tbase; /* Tx Buffer Descriptors Base Address */ unsigned short chamr; /* Channel Mode Register */ unsigned long tstate; /* Tx Internal State */ unsigned long txintr; /* Tx Internal Data Pointer */