/* * arch/arm/mach-orion5x/common.c * * Core functions for Marvell Orion 5x SoCs * * Maintainer: Tzachi Perelstein * * This file is licensed under the terms of the GNU General Public * License version 2. This program is licensed "as is" without any * warranty of any kind, whether express or implied. */ #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include "common.h" /***************************************************************************** * I/O Address Mapping ****************************************************************************/ static struct map_desc orion5x_io_desc[] __initdata = { { .virtual = (unsigned long) ORION5X_REGS_VIRT_BASE, .pfn = __phys_to_pfn(ORION5X_REGS_PHYS_BASE), .length = ORION5X_REGS_SIZE, .type = MT_DEVICE, }, { .virtual = (unsigned long) ORION5X_PCIE_WA_VIRT_BASE, .pfn = __phys_to_pfn(ORION5X_PCIE_WA_PHYS_BASE), .length = ORION5X_PCIE_WA_SIZE, .type = MT_DEVICE, }, }; void __init orion5x_map_io(void) { iotable_init(orion5x_io_desc, ARRAY_SIZE(orion5x_io_desc)); } /***************************************************************************** * CLK tree ****************************************************************************/ static struct clk *tclk; void __init clk_init(void) { tclk = clk_register_fixed_rate(NULL, "tclk", NULL, CLK_IS_ROOT, orion5x_tclk); orion_clkdev_init(tclk); } /***************************************************************************** * EHCI0 ****************************************************************************/ void __init orion5x_ehci0_init(void) { orion_ehci_init(ORION5X_USB0_PHYS_BASE, IRQ_ORION5X_USB0_CTRL, EHCI_PHY_ORION); } /***************************************************************************** * EHCI1 ****************************************************************************/ void __init orion5x_ehci1_init(void) { orion_ehci_1_init(ORION5X_USB1_PHYS_BASE, IRQ_ORION5X_USB1_CTRL); } /***************************************************************************** * GE00 ****************************************************************************/ void __init orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data) { orion_ge00_init(eth_data, ORION5X_ETH_PHYS_BASE, IRQ_ORION5X_ETH_SUM, IRQ_ORION5X_ETH_ERR, MV643XX_TX_CSUM_DEFAULT_LIMIT); } /***************************************************************************** * Ethernet switch ****************************************************************************/ void __init orion5x_eth_switch_init(struct dsa_platform_data *d, int irq) { orion_ge00_switch_init(d, irq); } /***************************************************************************** * I2C ****************************************************************************/ void __init orion5x_i2c_init(void) { orion_i2c_init(I2C_PHYS_BASE, IRQ_ORION5X_I2C, 8); } /***************************************************************************** * SATA ****************************************************************************/ void __init orion5x_sata_init(struct mv_sata_platform_data *sata_data) { orion_sata_init(sata_data, ORION5X_SATA_PHYS_BASE, IRQ_ORION5X_SATA); } /*****************************************************************************