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@@ -453,3 +453,188 @@ void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data)
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/* input/irq */
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if (gpio_is_valid(data->slot[0].detect_pin)) {
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at91_set_gpio_input(data->slot[0].detect_pin, 1);
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+ at91_set_deglitch(data->slot[0].detect_pin, 1);
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+ }
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+ if (gpio_is_valid(data->slot[0].wp_pin))
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+ at91_set_gpio_input(data->slot[0].wp_pin, 1);
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+
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+ if (mmc_id == 0) { /* MCI0 */
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+
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+ /* CLK */
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+ at91_set_A_periph(AT91_PIN_PA0, 0);
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+
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+ /* CMD */
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+ at91_set_A_periph(AT91_PIN_PA1, 1);
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+
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+ /* DAT0, maybe DAT1..DAT3 and maybe DAT4..DAT7 */
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+ at91_set_A_periph(AT91_PIN_PA2, 1);
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+ if (data->slot[0].bus_width == 4) {
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+ at91_set_A_periph(AT91_PIN_PA3, 1);
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+ at91_set_A_periph(AT91_PIN_PA4, 1);
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+ at91_set_A_periph(AT91_PIN_PA5, 1);
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+ if (data->slot[0].bus_width == 8) {
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+ at91_set_A_periph(AT91_PIN_PA6, 1);
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+ at91_set_A_periph(AT91_PIN_PA7, 1);
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+ at91_set_A_periph(AT91_PIN_PA8, 1);
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+ at91_set_A_periph(AT91_PIN_PA9, 1);
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+ }
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+ }
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+
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+ mmc0_data = *data;
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+ platform_device_register(&at91sam9g45_mmc0_device);
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+
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+ } else { /* MCI1 */
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+
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+ /* CLK */
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+ at91_set_A_periph(AT91_PIN_PA31, 0);
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+
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+ /* CMD */
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+ at91_set_A_periph(AT91_PIN_PA22, 1);
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+
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+ /* DAT0, maybe DAT1..DAT3 and maybe DAT4..DAT7 */
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+ at91_set_A_periph(AT91_PIN_PA23, 1);
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+ if (data->slot[0].bus_width == 4) {
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+ at91_set_A_periph(AT91_PIN_PA24, 1);
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+ at91_set_A_periph(AT91_PIN_PA25, 1);
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+ at91_set_A_periph(AT91_PIN_PA26, 1);
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+ if (data->slot[0].bus_width == 8) {
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+ at91_set_A_periph(AT91_PIN_PA27, 1);
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+ at91_set_A_periph(AT91_PIN_PA28, 1);
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+ at91_set_A_periph(AT91_PIN_PA29, 1);
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+ at91_set_A_periph(AT91_PIN_PA30, 1);
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+ }
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+ }
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+
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+ mmc1_data = *data;
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+ platform_device_register(&at91sam9g45_mmc1_device);
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+
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+ }
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+}
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+#else
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+void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data) {}
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+#endif
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+
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+
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+/* --------------------------------------------------------------------
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+ * NAND / SmartMedia
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+ * -------------------------------------------------------------------- */
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+
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+#if defined(CONFIG_MTD_NAND_ATMEL) || defined(CONFIG_MTD_NAND_ATMEL_MODULE)
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+static struct atmel_nand_data nand_data;
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+
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+#define NAND_BASE AT91_CHIPSELECT_3
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+
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+static struct resource nand_resources[] = {
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+ [0] = {
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+ .start = NAND_BASE,
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+ .end = NAND_BASE + SZ_256M - 1,
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+ .flags = IORESOURCE_MEM,
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+ },
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+ [1] = {
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+ .start = AT91SAM9G45_BASE_ECC,
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+ .end = AT91SAM9G45_BASE_ECC + SZ_512 - 1,
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+ .flags = IORESOURCE_MEM,
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+ }
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+};
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+
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+static struct platform_device at91sam9g45_nand_device = {
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+ .name = "atmel_nand",
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+ .id = -1,
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+ .dev = {
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+ .platform_data = &nand_data,
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+ },
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+ .resource = nand_resources,
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+ .num_resources = ARRAY_SIZE(nand_resources),
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+};
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+
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+void __init at91_add_device_nand(struct atmel_nand_data *data)
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+{
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+ unsigned long csa;
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+
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+ if (!data)
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+ return;
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+
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+ csa = at91_matrix_read(AT91_MATRIX_EBICSA);
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+ at91_matrix_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA);
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+
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+ /* enable pin */
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+ if (gpio_is_valid(data->enable_pin))
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+ at91_set_gpio_output(data->enable_pin, 1);
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+
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+ /* ready/busy pin */
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+ if (gpio_is_valid(data->rdy_pin))
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+ at91_set_gpio_input(data->rdy_pin, 1);
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+
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+ /* card detect pin */
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+ if (gpio_is_valid(data->det_pin))
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+ at91_set_gpio_input(data->det_pin, 1);
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+
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+ nand_data = *data;
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+ platform_device_register(&at91sam9g45_nand_device);
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+}
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+#else
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+void __init at91_add_device_nand(struct atmel_nand_data *data) {}
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+#endif
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+
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+
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+/* --------------------------------------------------------------------
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+ * TWI (i2c)
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+ * -------------------------------------------------------------------- */
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+
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+/*
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+ * Prefer the GPIO code since the TWI controller isn't robust
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+ * (gets overruns and underruns under load) and can only issue
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+ * repeated STARTs in one scenario (the driver doesn't yet handle them).
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+ */
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+#if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
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+static struct i2c_gpio_platform_data pdata_i2c0 = {
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+ .sda_pin = AT91_PIN_PA20,
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+ .sda_is_open_drain = 1,
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+ .scl_pin = AT91_PIN_PA21,
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+ .scl_is_open_drain = 1,
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+ .udelay = 5, /* ~100 kHz */
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+};
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+
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+static struct platform_device at91sam9g45_twi0_device = {
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+ .name = "i2c-gpio",
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+ .id = 0,
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+ .dev.platform_data = &pdata_i2c0,
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+};
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+
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+static struct i2c_gpio_platform_data pdata_i2c1 = {
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+ .sda_pin = AT91_PIN_PB10,
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+ .sda_is_open_drain = 1,
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+ .scl_pin = AT91_PIN_PB11,
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+ .scl_is_open_drain = 1,
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+ .udelay = 5, /* ~100 kHz */
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+};
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+
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+static struct platform_device at91sam9g45_twi1_device = {
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+ .name = "i2c-gpio",
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+ .id = 1,
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+ .dev.platform_data = &pdata_i2c1,
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+};
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+
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+void __init at91_add_device_i2c(short i2c_id, struct i2c_board_info *devices, int nr_devices)
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+{
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+ i2c_register_board_info(i2c_id, devices, nr_devices);
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+
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+ if (i2c_id == 0) {
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+ at91_set_GPIO_periph(AT91_PIN_PA20, 1); /* TWD (SDA) */
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+ at91_set_multi_drive(AT91_PIN_PA20, 1);
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+
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+ at91_set_GPIO_periph(AT91_PIN_PA21, 1); /* TWCK (SCL) */
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+ at91_set_multi_drive(AT91_PIN_PA21, 1);
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+
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+ platform_device_register(&at91sam9g45_twi0_device);
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+ } else {
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+ at91_set_GPIO_periph(AT91_PIN_PB10, 1); /* TWD (SDA) */
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+ at91_set_multi_drive(AT91_PIN_PB10, 1);
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+
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+ at91_set_GPIO_periph(AT91_PIN_PB11, 1); /* TWCK (SCL) */
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+ at91_set_multi_drive(AT91_PIN_PB11, 1);
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+
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+ platform_device_register(&at91sam9g45_twi1_device);
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+ }
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+}
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+
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