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@@ -1294,3 +1294,56 @@ typedef struct {
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**********/
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/*
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+ * ICE Module Address Compare Register
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+ */
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+#define ICEMACR_ADDR 0xfffffd00
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+#define ICEMACR LONG_REF(ICEMACR_ADDR)
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+
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+/*
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+ * ICE Module Address Mask Register
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+ */
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+#define ICEMAMR_ADDR 0xfffffd04
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+#define ICEMAMR LONG_REF(ICEMAMR_ADDR)
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+
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+/*
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+ * ICE Module Control Compare Register
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+ */
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+#define ICEMCCR_ADDR 0xfffffd08
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+#define ICEMCCR WORD_REF(ICEMCCR_ADDR)
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+
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+#define ICEMCCR_PD 0x0001 /* Program/Data Cycle Selection */
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+#define ICEMCCR_RW 0x0002 /* Read/Write Cycle Selection */
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+
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+/*
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+ * ICE Module Control Mask Register
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+ */
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+#define ICEMCMR_ADDR 0xfffffd0a
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+#define ICEMCMR WORD_REF(ICEMCMR_ADDR)
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+
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+#define ICEMCMR_PDM 0x0001 /* Program/Data Cycle Mask */
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+#define ICEMCMR_RWM 0x0002 /* Read/Write Cycle Mask */
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+
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+/*
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+ * ICE Module Control Register
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+ */
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+#define ICEMCR_ADDR 0xfffffd0c
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+#define ICEMCR WORD_REF(ICEMCR_ADDR)
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+
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+#define ICEMCR_CEN 0x0001 /* Compare Enable */
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+#define ICEMCR_PBEN 0x0002 /* Program Break Enable */
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+#define ICEMCR_SB 0x0004 /* Single Breakpoint */
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+#define ICEMCR_HMDIS 0x0008 /* HardMap disable */
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+#define ICEMCR_BBIEN 0x0010 /* Bus Break Interrupt Enable */
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+
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+/*
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+ * ICE Module Status Register
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+ */
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+#define ICEMSR_ADDR 0xfffffd0e
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+#define ICEMSR WORD_REF(ICEMSR_ADDR)
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+
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+#define ICEMSR_EMUEN 0x0001 /* Emulation Enable */
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+#define ICEMSR_BRKIRQ 0x0002 /* A-Line Vector Fetch Detected */
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+#define ICEMSR_BBIRQ 0x0004 /* Bus Break Interrupt Detected */
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+#define ICEMSR_EMIRQ 0x0008 /* EMUIRQ Falling Edge Detected */
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+
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+#endif /* _MC68VZ328_H_ */
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