efHotAgingTrendMining memoryCall.h 李欣儒 commit at 2021-02-21

efHotAgingTrendMining/dataSharedMemory/memoryCall.h

@@ -1339,3 +1339,109 @@
 #define OMAP4430_OPTFCLKEN_48MHZ_CLK_SHIFT			9
 #define OMAP4430_OPTFCLKEN_48MHZ_CLK_WIDTH			0x1
 #define OMAP4430_OPTFCLKEN_48MHZ_CLK_MASK			(1 << 9)
+
+/* Used by CM_WKUP_BANDGAP_CLKCTRL */
+#define OMAP4430_OPTFCLKEN_BGAP_32K_SHIFT			8
+#define OMAP4430_OPTFCLKEN_BGAP_32K_WIDTH			0x1
+#define OMAP4430_OPTFCLKEN_BGAP_32K_MASK			(1 << 8)
+
+/* Used by CM_ALWON_USBPHY_CLKCTRL */
+#define OMAP4430_OPTFCLKEN_CLK32K_SHIFT				8
+#define OMAP4430_OPTFCLKEN_CLK32K_WIDTH				0x1
+#define OMAP4430_OPTFCLKEN_CLK32K_MASK				(1 << 8)
+
+/* Used by CM_CAM_ISS_CLKCTRL */
+#define OMAP4430_OPTFCLKEN_CTRLCLK_SHIFT			8
+#define OMAP4430_OPTFCLKEN_CTRLCLK_WIDTH			0x1
+#define OMAP4430_OPTFCLKEN_CTRLCLK_MASK				(1 << 8)
+
+/*
+ * Used by CM_L4PER_GPIO2_CLKCTRL, CM_L4PER_GPIO3_CLKCTRL,
+ * CM_L4PER_GPIO4_CLKCTRL, CM_L4PER_GPIO5_CLKCTRL, CM_L4PER_GPIO6_CLKCTRL,
+ * CM_WKUP_GPIO1_CLKCTRL
+ */
+#define OMAP4430_OPTFCLKEN_DBCLK_SHIFT				8
+#define OMAP4430_OPTFCLKEN_DBCLK_WIDTH				0x1
+#define OMAP4430_OPTFCLKEN_DBCLK_MASK				(1 << 8)
+
+/* Used by CM_MEMIF_DLL_CLKCTRL, CM_MEMIF_DLL_H_CLKCTRL */
+#define OMAP4430_OPTFCLKEN_DLL_CLK_SHIFT			8
+#define OMAP4430_OPTFCLKEN_DLL_CLK_WIDTH			0x1
+#define OMAP4430_OPTFCLKEN_DLL_CLK_MASK				(1 << 8)
+
+/* Used by CM_DSS_DSS_CLKCTRL */
+#define OMAP4430_OPTFCLKEN_DSSCLK_SHIFT				8
+#define OMAP4430_OPTFCLKEN_DSSCLK_WIDTH				0x1
+#define OMAP4430_OPTFCLKEN_DSSCLK_MASK				(1 << 8)
+
+/* Used by CM_WKUP_USIM_CLKCTRL */
+#define OMAP4430_OPTFCLKEN_FCLK_SHIFT				8
+#define OMAP4430_OPTFCLKEN_FCLK_WIDTH				0x1
+#define OMAP4430_OPTFCLKEN_FCLK_MASK				(1 << 8)
+
+/* Used by CM1_ABE_SLIMBUS_CLKCTRL */
+#define OMAP4430_OPTFCLKEN_FCLK0_SHIFT				8
+#define OMAP4430_OPTFCLKEN_FCLK0_WIDTH				0x1
+#define OMAP4430_OPTFCLKEN_FCLK0_MASK				(1 << 8)
+
+/* Used by CM1_ABE_SLIMBUS_CLKCTRL */
+#define OMAP4430_OPTFCLKEN_FCLK1_SHIFT				9
+#define OMAP4430_OPTFCLKEN_FCLK1_WIDTH				0x1
+#define OMAP4430_OPTFCLKEN_FCLK1_MASK				(1 << 9)
+
+/* Used by CM1_ABE_SLIMBUS_CLKCTRL */
+#define OMAP4430_OPTFCLKEN_FCLK2_SHIFT				10
+#define OMAP4430_OPTFCLKEN_FCLK2_WIDTH				0x1
+#define OMAP4430_OPTFCLKEN_FCLK2_MASK				(1 << 10)
+
+/* Used by CM_L3INIT_USB_HOST_CLKCTRL */
+#define OMAP4430_OPTFCLKEN_FUNC48MCLK_SHIFT			15
+#define OMAP4430_OPTFCLKEN_FUNC48MCLK_WIDTH			0x1
+#define OMAP4430_OPTFCLKEN_FUNC48MCLK_MASK			(1 << 15)
+
+/* Used by CM_L3INIT_USB_HOST_CLKCTRL */
+#define OMAP4430_OPTFCLKEN_HSIC480M_P1_CLK_SHIFT		13
+#define OMAP4430_OPTFCLKEN_HSIC480M_P1_CLK_WIDTH		0x1
+#define OMAP4430_OPTFCLKEN_HSIC480M_P1_CLK_MASK			(1 << 13)
+
+/* Used by CM_L3INIT_USB_HOST_CLKCTRL */
+#define OMAP4430_OPTFCLKEN_HSIC480M_P2_CLK_SHIFT		14
+#define OMAP4430_OPTFCLKEN_HSIC480M_P2_CLK_WIDTH		0x1
+#define OMAP4430_OPTFCLKEN_HSIC480M_P2_CLK_MASK			(1 << 14)
+
+/* Used by CM_L3INIT_USB_HOST_CLKCTRL */
+#define OMAP4430_OPTFCLKEN_HSIC60M_P1_CLK_SHIFT			11
+#define OMAP4430_OPTFCLKEN_HSIC60M_P1_CLK_WIDTH			0x1
+#define OMAP4430_OPTFCLKEN_HSIC60M_P1_CLK_MASK			(1 << 11)
+
+/* Used by CM_L3INIT_USB_HOST_CLKCTRL */
+#define OMAP4430_OPTFCLKEN_HSIC60M_P2_CLK_SHIFT			12
+#define OMAP4430_OPTFCLKEN_HSIC60M_P2_CLK_WIDTH			0x1
+#define OMAP4430_OPTFCLKEN_HSIC60M_P2_CLK_MASK			(1 << 12)
+
+/* Used by CM_L4PER_SLIMBUS2_CLKCTRL */
+#define OMAP4430_OPTFCLKEN_PER24MC_GFCLK_SHIFT			8
+#define OMAP4430_OPTFCLKEN_PER24MC_GFCLK_WIDTH			0x1
+#define OMAP4430_OPTFCLKEN_PER24MC_GFCLK_MASK			(1 << 8)
+
+/* Used by CM_L4PER_SLIMBUS2_CLKCTRL */
+#define OMAP4430_OPTFCLKEN_PERABE24M_GFCLK_SHIFT		9
+#define OMAP4430_OPTFCLKEN_PERABE24M_GFCLK_WIDTH		0x1
+#define OMAP4430_OPTFCLKEN_PERABE24M_GFCLK_MASK			(1 << 9)
+
+/* Used by CM_L3INIT_USBPHYOCP2SCP_CLKCTRL */
+#define OMAP4430_OPTFCLKEN_PHY_48M_SHIFT			8
+#define OMAP4430_OPTFCLKEN_PHY_48M_WIDTH			0x1
+#define OMAP4430_OPTFCLKEN_PHY_48M_MASK				(1 << 8)
+
+/* Used by CM_L4PER_SLIMBUS2_CLKCTRL */
+#define OMAP4430_OPTFCLKEN_SLIMBUS_CLK_SHIFT			10
+#define OMAP4430_OPTFCLKEN_SLIMBUS_CLK_WIDTH			0x1
+#define OMAP4430_OPTFCLKEN_SLIMBUS_CLK_MASK			(1 << 10)
+
+/* Renamed from OPTFCLKEN_SLIMBUS_CLK Used by CM1_ABE_SLIMBUS_CLKCTRL */
+#define OMAP4430_OPTFCLKEN_SLIMBUS_CLK_11_11_SHIFT		11
+#define OMAP4430_OPTFCLKEN_SLIMBUS_CLK_11_11_WIDTH		0x1
+#define OMAP4430_OPTFCLKEN_SLIMBUS_CLK_11_11_MASK		(1 << 11)
+
+/* Used by CM_DSS_DSS_CLKCTRL */