|
@@ -0,0 +1,185 @@
|
|
|
+/* arch/arm/mach-msm/smd_private.h
|
|
|
+ *
|
|
|
+ * Copyright (C) 2007 Google, Inc.
|
|
|
+ * Copyright (c) 2007 QUALCOMM Incorporated
|
|
|
+ *
|
|
|
+ * This software is licensed under the terms of the GNU General Public
|
|
|
+ * License version 2, as published by the Free Software Foundation, and
|
|
|
+ * may be copied, distributed, and modified under those terms.
|
|
|
+ *
|
|
|
+ * This program is distributed in the hope that it will be useful,
|
|
|
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
|
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
|
+ * GNU General Public License for more details.
|
|
|
+ *
|
|
|
+ */
|
|
|
+#ifndef _ARCH_ARM_MACH_MSM_MSM_SMD_PRIVATE_H_
|
|
|
+#define _ARCH_ARM_MACH_MSM_MSM_SMD_PRIVATE_H_
|
|
|
+
|
|
|
+#include <linux/platform_device.h>
|
|
|
+#include <linux/spinlock.h>
|
|
|
+#include <linux/list.h>
|
|
|
+#include <linux/io.h>
|
|
|
+
|
|
|
+#include <mach/msm_iomap.h>
|
|
|
+
|
|
|
+struct smem_heap_info {
|
|
|
+ unsigned initialized;
|
|
|
+ unsigned free_offset;
|
|
|
+ unsigned heap_remaining;
|
|
|
+ unsigned reserved;
|
|
|
+};
|
|
|
+
|
|
|
+struct smem_heap_entry {
|
|
|
+ unsigned allocated;
|
|
|
+ unsigned offset;
|
|
|
+ unsigned size;
|
|
|
+ unsigned reserved;
|
|
|
+};
|
|
|
+
|
|
|
+struct smem_proc_comm {
|
|
|
+ unsigned command;
|
|
|
+ unsigned status;
|
|
|
+ unsigned data1;
|
|
|
+ unsigned data2;
|
|
|
+};
|
|
|
+
|
|
|
+#define PC_APPS 0
|
|
|
+#define PC_MODEM 1
|
|
|
+
|
|
|
+#define VERSION_SMD 0
|
|
|
+#define VERSION_QDSP6 4
|
|
|
+#define VERSION_APPS_SBL 6
|
|
|
+#define VERSION_MODEM_SBL 7
|
|
|
+#define VERSION_APPS 8
|
|
|
+#define VERSION_MODEM 9
|
|
|
+
|
|
|
+struct smem_shared {
|
|
|
+ struct smem_proc_comm proc_comm[4];
|
|
|
+ unsigned version[32];
|
|
|
+ struct smem_heap_info heap_info;
|
|
|
+ struct smem_heap_entry heap_toc[512];
|
|
|
+};
|
|
|
+
|
|
|
+#define SMSM_V1_SIZE (sizeof(unsigned) * 8)
|
|
|
+#define SMSM_V2_SIZE (sizeof(unsigned) * 4)
|
|
|
+
|
|
|
+#ifdef CONFIG_MSM_SMD_PKG3
|
|
|
+struct smsm_interrupt_info {
|
|
|
+ uint32_t interrupt_mask;
|
|
|
+ uint32_t pending_interrupts;
|
|
|
+ uint32_t wakeup_reason;
|
|
|
+};
|
|
|
+#else
|
|
|
+#define DEM_MAX_PORT_NAME_LEN (20)
|
|
|
+struct msm_dem_slave_data {
|
|
|
+ uint32_t sleep_time;
|
|
|
+ uint32_t interrupt_mask;
|
|
|
+ uint32_t resources_used;
|
|
|
+ uint32_t reserved1;
|
|
|
+
|
|
|
+ uint32_t wakeup_reason;
|
|
|
+ uint32_t pending_interrupts;
|
|
|
+ uint32_t rpc_prog;
|
|
|
+ uint32_t rpc_proc;
|
|
|
+ char smd_port_name[DEM_MAX_PORT_NAME_LEN];
|
|
|
+ uint32_t reserved2;
|
|
|
+};
|
|
|
+#endif
|
|
|
+
|
|
|
+#define SZ_DIAG_ERR_MSG 0xC8
|
|
|
+#define ID_DIAG_ERR_MSG SMEM_DIAG_ERR_MESSAGE
|
|
|
+#define ID_SMD_CHANNELS SMEM_SMD_BASE_ID
|
|
|
+#define ID_SHARED_STATE SMEM_SMSM_SHARED_STATE
|
|
|
+#define ID_CH_ALLOC_TBL SMEM_CHANNEL_ALLOC_TBL
|
|
|
+
|
|
|
+#define SMSM_INIT 0x00000001
|
|
|
+#define SMSM_SMDINIT 0x00000008
|
|
|
+#define SMSM_RPCINIT 0x00000020
|
|
|
+#define SMSM_RESET 0x00000040
|
|
|
+#define SMSM_RSA 0x00000080
|
|
|
+#define SMSM_RUN 0x00000100
|
|
|
+#define SMSM_PWRC 0x00000200
|
|
|
+#define SMSM_TIMEWAIT 0x00000400
|
|
|
+#define SMSM_TIMEINIT 0x00000800
|
|
|
+#define SMSM_PWRC_EARLY_EXIT 0x00001000
|
|
|
+#define SMSM_WFPI 0x00002000
|
|
|
+#define SMSM_SLEEP 0x00004000
|
|
|
+#define SMSM_SLEEPEXIT 0x00008000
|
|
|
+#define SMSM_APPS_REBOOT 0x00020000
|
|
|
+#define SMSM_SYSTEM_POWER_DOWN 0x00040000
|
|
|
+#define SMSM_SYSTEM_REBOOT 0x00080000
|
|
|
+#define SMSM_SYSTEM_DOWNLOAD 0x00100000
|
|
|
+#define SMSM_PWRC_SUSPEND 0x00200000
|
|
|
+#define SMSM_APPS_SHUTDOWN 0x00400000
|
|
|
+#define SMSM_SMD_LOOPBACK 0x00800000
|
|
|
+#define SMSM_RUN_QUIET 0x01000000
|
|
|
+#define SMSM_MODEM_WAIT 0x02000000
|
|
|
+#define SMSM_MODEM_BREAK 0x04000000
|
|
|
+#define SMSM_MODEM_CONTINUE 0x08000000
|
|
|
+#define SMSM_UNKNOWN 0x80000000
|
|
|
+
|
|
|
+#define SMSM_WKUP_REASON_RPC 0x00000001
|
|
|
+#define SMSM_WKUP_REASON_INT 0x00000002
|
|
|
+#define SMSM_WKUP_REASON_GPIO 0x00000004
|
|
|
+#define SMSM_WKUP_REASON_TIMER 0x00000008
|
|
|
+#define SMSM_WKUP_REASON_ALARM 0x00000010
|
|
|
+#define SMSM_WKUP_REASON_RESET 0x00000020
|
|
|
+
|
|
|
+#ifdef CONFIG_ARCH_MSM7X00A
|
|
|
+enum smsm_state_item {
|
|
|
+ SMSM_STATE_APPS = 1,
|
|
|
+ SMSM_STATE_MODEM = 3,
|
|
|
+ SMSM_STATE_COUNT,
|
|
|
+};
|
|
|
+#else
|
|
|
+enum smsm_state_item {
|
|
|
+ SMSM_STATE_APPS,
|
|
|
+ SMSM_STATE_MODEM,
|
|
|
+ SMSM_STATE_HEXAGON,
|
|
|
+ SMSM_STATE_APPS_DEM,
|
|
|
+ SMSM_STATE_MODEM_DEM,
|
|
|
+ SMSM_STATE_QDSP6_DEM,
|
|
|
+ SMSM_STATE_POWER_MASTER_DEM,
|
|
|
+ SMSM_STATE_TIME_MASTER_DEM,
|
|
|
+ SMSM_STATE_COUNT,
|
|
|
+};
|
|
|
+#endif
|
|
|
+
|
|
|
+void *smem_alloc(unsigned id, unsigned size);
|
|
|
+int smsm_change_state(enum smsm_state_item item, uint32_t clear_mask, uint32_t set_mask);
|
|
|
+uint32_t smsm_get_state(enum smsm_state_item item);
|
|
|
+int smsm_set_sleep_duration(uint32_t delay);
|
|
|
+void smsm_print_sleep_info(void);
|
|
|
+
|
|
|
+#define SMEM_NUM_SMD_CHANNELS 64
|
|
|
+
|
|
|
+typedef enum {
|
|
|
+ /* fixed items */
|
|
|
+ SMEM_PROC_COMM = 0,
|
|
|
+ SMEM_HEAP_INFO,
|
|
|
+ SMEM_ALLOCATION_TABLE,
|
|
|
+ SMEM_VERSION_INFO,
|
|
|
+ SMEM_HW_RESET_DETECT,
|
|
|
+ SMEM_AARM_WARM_BOOT,
|
|
|
+ SMEM_DIAG_ERR_MESSAGE,
|
|
|
+ SMEM_SPINLOCK_ARRAY,
|
|
|
+ SMEM_MEMORY_BARRIER_LOCATION,
|
|
|
+
|
|
|
+ /* dynamic items */
|
|
|
+ SMEM_AARM_PARTITION_TABLE,
|
|
|
+ SMEM_AARM_BAD_BLOCK_TABLE,
|
|
|
+ SMEM_RESERVE_BAD_BLOCKS,
|
|
|
+ SMEM_WM_UUID,
|
|
|
+ SMEM_CHANNEL_ALLOC_TBL,
|
|
|
+ SMEM_SMD_BASE_ID,
|
|
|
+ SMEM_SMEM_LOG_IDX = SMEM_SMD_BASE_ID + SMEM_NUM_SMD_CHANNELS,
|
|
|
+ SMEM_SMEM_LOG_EVENTS,
|
|
|
+ SMEM_SMEM_STATIC_LOG_IDX,
|
|
|
+ SMEM_SMEM_STATIC_LOG_EVENTS,
|
|
|
+ SMEM_SMEM_SLOW_CLOCK_SYNC,
|
|
|
+ SMEM_SMEM_SLOW_CLOCK_VALUE,
|
|
|
+ SMEM_BIO_LED_BUF,
|
|
|
+ SMEM_SMSM_SHARED_STATE,
|
|
|
+ SMEM_SMSM_INT_INFO,
|
|
|
+ SMEM_SMSM_SLEEP_DELAY,
|