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@@ -0,0 +1,132 @@
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+/*
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+ * SA-1101.h
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+ *
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+ * Copyright (c) Peter Danielsson 1999
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+ *
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+ * Definition of constants related to the sa1101
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+ * support chip for the sa1100
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+ *
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+ */
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+
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+
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+/* Be sure that virtual mapping is defined right */
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+#ifndef __ASM_ARCH_HARDWARE_H
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+#error You must include hardware.h not SA-1101.h
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+#endif
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+
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+#ifndef SA1101_BASE
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+#error You must define SA-1101 physical base address
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+#endif
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+
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+#ifndef LANGUAGE
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+# ifdef __ASSEMBLY__
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+# define LANGUAGE Assembly
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+# else
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+# define LANGUAGE C
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+# endif
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+#endif
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+
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+/*
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+ * We have mapped the sa1101 depending on the value of SA1101_BASE.
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+ * It then appears from 0xf4000000.
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+ */
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+
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+#define SA1101_p2v( x ) ((x) - SA1101_BASE + 0xf4000000)
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+#define SA1101_v2p( x ) ((x) - 0xf4000000 + SA1101_BASE)
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+
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+#ifndef SA1101_p2v
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+#define SA1101_p2v(PhAdd) (PhAdd)
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+#endif
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+
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+#include <mach/bitfield.h>
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+
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+#define C 0
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+#define Assembly 1
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+
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+
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+/*
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+ * Memory map
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+ */
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+
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+#define __SHMEM_CONTROL0 0x00000000
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+#define __SYSTEM_CONTROL1 0x00000400
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+#define __ARBITER 0x00020000
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+#define __SYSTEM_CONTROL2 0x00040000
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+#define __SYSTEM_CONTROL3 0x00060000
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+#define __PARALLEL_PORT 0x00080000
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+#define __VIDMEM_CONTROL 0x00100000
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+#define __UPDATE_FIFO 0x00120000
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+#define __SHMEM_CONTROL1 0x00140000
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+#define __INTERRUPT_CONTROL 0x00160000
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+#define __USB_CONTROL 0x00180000
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+#define __TRACK_INTERFACE 0x001a0000
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+#define __MOUSE_INTERFACE 0x001b0000
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+#define __KEYPAD_INTERFACE 0x001c0000
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+#define __PCMCIA_INTERFACE 0x001e0000
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+#define __VGA_CONTROL 0x00200000
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+#define __GPIO_INTERFACE 0x00300000
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+
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+/*
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+ * Macro that calculates real address for registers in the SA-1101
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+ */
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+
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+#define _SA1101( x ) ((x) + SA1101_BASE)
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+
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+/*
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+ * Interface and shared memory controller registers
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+ *
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+ * Registers
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+ * SKCR SA-1101 control register (read/write)
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+ * SMCR Shared Memory Controller Register
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+ * SNPR Snoop Register
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+ */
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+
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+#define _SKCR _SA1101( 0x00000000 ) /* SA-1101 Control Reg. */
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+#define _SMCR _SA1101( 0x00140000 ) /* Shared Mem. Control Reg. */
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+#define _SNPR _SA1101( 0x00140400 ) /* Snoop Reg. */
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+
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+#if LANGUAGE == C
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+#define SKCR (*((volatile Word *) SA1101_p2v (_SKCR)))
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+#define SMCR (*((volatile Word *) SA1101_p2v (_SMCR)))
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+#define SNPR (*((volatile Word *) SA1101_p2v (_SNPR)))
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+
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+#define SKCR_PLLEn 0x0001 /* Enable On-Chip PLL */
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+#define SKCR_BCLKEn 0x0002 /* Enables BCLK */
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+#define SKCR_Sleep 0x0004 /* Sleep Mode */
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+#define SKCR_IRefEn 0x0008 /* DAC Iref input enable */
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+#define SKCR_VCOON 0x0010 /* VCO bias */
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+#define SKCR_ScanTestEn 0x0020 /* Enables scan test */
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+#define SKCR_ClockTestEn 0x0040 /* Enables clock test */
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+
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+#define SMCR_DCAC Fld(2,0) /* Number of column address bits */
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+#define SMCR_DRAC Fld(2,2) /* Number of row address bits */
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+#define SMCR_ArbiterBias 0x0008 /* favor video or USB */
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+#define SMCR_TopVidMem Fld(4,5) /* Top 4 bits of vidmem addr. */
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+
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+#define SMCR_ColAdrBits( x ) /* col. addr bits 8..11 */ \
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+ (( (x) - 8 ) << FShft (SMCR_DCAC))
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+#define SMCR_RowAdrBits( x ) /* row addr bits 9..12 */\
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+ (( (x) - 9 ) << FShft (SMCR_DRAC))
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+
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+#define SNPR_VFBstart Fld(12,0) /* Video frame buffer addr */
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+#define SNPR_VFBsize Fld(11,12) /* Video frame buffer size */
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+#define SNPR_WholeBank (1 << 23) /* Whole bank bit */
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+#define SNPR_BankSelect Fld(2,27) /* Bank select */
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+#define SNPR_SnoopEn (1 << 31) /* Enable snoop operation */
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+
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+#define SNPR_Set_VFBsize( x ) /* set frame buffer size (in kb) */ \
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+ ( (x) << FShft (SNPR_VFBsize))
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+#define SNPR_Select_Bank(x) /* select bank 0 or 1 */ \
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+ (( (x) + 1 ) << FShft (SNPR_BankSelect ))
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+
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+#endif /* LANGUAGE == C */
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+
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+/*
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+ * Video Memory Controller
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+ *
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+ * Registers
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+ * VMCCR Configuration register
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+ * VMCAR VMC address register
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+ * VMCDR VMC data register
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+ *
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+ */
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