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+/*
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+ * arch/arm/mach-versatile/include/mach/platform.h
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+ *
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+ * Copyright (c) ARM Limited 2003. All rights reserved.
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License as published by
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+ * the Free Software Foundation; either version 2 of the License, or
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+ * (at your option) any later version.
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+ *
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+ * This program is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ *
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+ * You should have received a copy of the GNU General Public License
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+ * along with this program; if not, write to the Free Software
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+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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+ */
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+
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+#ifndef __address_h
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+#define __address_h 1
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+
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+/*
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+ * Memory definitions
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+ */
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+#define VERSATILE_BOOT_ROM_LO 0x30000000 /* DoC Base (64Mb)...*/
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+#define VERSATILE_BOOT_ROM_HI 0x30000000
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+#define VERSATILE_BOOT_ROM_BASE VERSATILE_BOOT_ROM_HI /* Normal position */
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+#define VERSATILE_BOOT_ROM_SIZE SZ_64M
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+
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+#define VERSATILE_SSRAM_BASE /* VERSATILE_SSMC_BASE ? */
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+#define VERSATILE_SSRAM_SIZE SZ_2M
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+
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+#define VERSATILE_FLASH_BASE 0x34000000
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+#define VERSATILE_FLASH_SIZE SZ_64M
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+
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+/*
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+ * SDRAM
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+ */
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+#define VERSATILE_SDRAM_BASE 0x00000000
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+
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+/*
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+ * Logic expansion modules
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+ *
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+ */
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+
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+
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+/* ------------------------------------------------------------------------
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+ * Versatile Registers
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+ * ------------------------------------------------------------------------
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+ *
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+ */
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+#define VERSATILE_SYS_ID_OFFSET 0x00
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+#define VERSATILE_SYS_SW_OFFSET 0x04
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+#define VERSATILE_SYS_LED_OFFSET 0x08
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+#define VERSATILE_SYS_OSC0_OFFSET 0x0C
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+
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+#if defined(CONFIG_ARCH_VERSATILE_PB)
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+#define VERSATILE_SYS_OSC1_OFFSET 0x10
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+#define VERSATILE_SYS_OSC2_OFFSET 0x14
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+#define VERSATILE_SYS_OSC3_OFFSET 0x18
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+#define VERSATILE_SYS_OSC4_OFFSET 0x1C
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+#elif defined(CONFIG_MACH_VERSATILE_AB)
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+#define VERSATILE_SYS_OSC1_OFFSET 0x1C
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+#endif
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+
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+#define VERSATILE_SYS_OSCCLCD_OFFSET 0x1c
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+
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+#define VERSATILE_SYS_LOCK_OFFSET 0x20
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+#define VERSATILE_SYS_100HZ_OFFSET 0x24
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+#define VERSATILE_SYS_CFGDATA1_OFFSET 0x28
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+#define VERSATILE_SYS_CFGDATA2_OFFSET 0x2C
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+#define VERSATILE_SYS_FLAGS_OFFSET 0x30
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+#define VERSATILE_SYS_FLAGSSET_OFFSET 0x30
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+#define VERSATILE_SYS_FLAGSCLR_OFFSET 0x34
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+#define VERSATILE_SYS_NVFLAGS_OFFSET 0x38
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+#define VERSATILE_SYS_NVFLAGSSET_OFFSET 0x38
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+#define VERSATILE_SYS_NVFLAGSCLR_OFFSET 0x3C
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+#define VERSATILE_SYS_RESETCTL_OFFSET 0x40
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+#define VERSATILE_SYS_PCICTL_OFFSET 0x44
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+#define VERSATILE_SYS_MCI_OFFSET 0x48
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+#define VERSATILE_SYS_FLASH_OFFSET 0x4C
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+#define VERSATILE_SYS_CLCD_OFFSET 0x50
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+#define VERSATILE_SYS_CLCDSER_OFFSET 0x54
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+#define VERSATILE_SYS_BOOTCS_OFFSET 0x58
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+#define VERSATILE_SYS_24MHz_OFFSET 0x5C
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+#define VERSATILE_SYS_MISC_OFFSET 0x60
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+#define VERSATILE_SYS_TEST_OSC0_OFFSET 0x80
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+#define VERSATILE_SYS_TEST_OSC1_OFFSET 0x84
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+#define VERSATILE_SYS_TEST_OSC2_OFFSET 0x88
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+#define VERSATILE_SYS_TEST_OSC3_OFFSET 0x8C
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+#define VERSATILE_SYS_TEST_OSC4_OFFSET 0x90
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+
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+#define VERSATILE_SYS_BASE 0x10000000
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+#define VERSATILE_SYS_ID (VERSATILE_SYS_BASE + VERSATILE_SYS_ID_OFFSET)
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+#define VERSATILE_SYS_SW (VERSATILE_SYS_BASE + VERSATILE_SYS_SW_OFFSET)
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+#define VERSATILE_SYS_LED (VERSATILE_SYS_BASE + VERSATILE_SYS_LED_OFFSET)
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+#define VERSATILE_SYS_OSC0 (VERSATILE_SYS_BASE + VERSATILE_SYS_OSC0_OFFSET)
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+#define VERSATILE_SYS_OSC1 (VERSATILE_SYS_BASE + VERSATILE_SYS_OSC1_OFFSET)
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+
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+#if defined(CONFIG_ARCH_VERSATILE_PB)
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+#define VERSATILE_SYS_OSC2 (VERSATILE_SYS_BASE + VERSATILE_SYS_OSC2_OFFSET)
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+#define VERSATILE_SYS_OSC3 (VERSATILE_SYS_BASE + VERSATILE_SYS_OSC3_OFFSET)
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+#define VERSATILE_SYS_OSC4 (VERSATILE_SYS_BASE + VERSATILE_SYS_OSC4_OFFSET)
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+#endif
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+
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+#define VERSATILE_SYS_LOCK (VERSATILE_SYS_BASE + VERSATILE_SYS_LOCK_OFFSET)
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+#define VERSATILE_SYS_100HZ (VERSATILE_SYS_BASE + VERSATILE_SYS_100HZ_OFFSET)
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+#define VERSATILE_SYS_CFGDATA1 (VERSATILE_SYS_BASE + VERSATILE_SYS_CFGDATA1_OFFSET)
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+#define VERSATILE_SYS_CFGDATA2 (VERSATILE_SYS_BASE + VERSATILE_SYS_CFGDATA2_OFFSET)
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+#define VERSATILE_SYS_FLAGS (VERSATILE_SYS_BASE + VERSATILE_SYS_FLAGS_OFFSET)
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+#define VERSATILE_SYS_FLAGSSET (VERSATILE_SYS_BASE + VERSATILE_SYS_FLAGSSET_OFFSET)
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+#define VERSATILE_SYS_FLAGSCLR (VERSATILE_SYS_BASE + VERSATILE_SYS_FLAGSCLR_OFFSET)
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+#define VERSATILE_SYS_NVFLAGS (VERSATILE_SYS_BASE + VERSATILE_SYS_NVFLAGS_OFFSET)
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+#define VERSATILE_SYS_NVFLAGSSET (VERSATILE_SYS_BASE + VERSATILE_SYS_NVFLAGSSET_OFFSET)
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+#define VERSATILE_SYS_NVFLAGSCLR (VERSATILE_SYS_BASE + VERSATILE_SYS_NVFLAGSCLR_OFFSET)
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+#define VERSATILE_SYS_RESETCTL (VERSATILE_SYS_BASE + VERSATILE_SYS_RESETCTL_OFFSET)
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+#define VERSATILE_SYS_PCICTL (VERSATILE_SYS_BASE + VERSATILE_SYS_PCICTL_OFFSET)
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+#define VERSATILE_SYS_MCI (VERSATILE_SYS_BASE + VERSATILE_SYS_MCI_OFFSET)
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+#define VERSATILE_SYS_FLASH (VERSATILE_SYS_BASE + VERSATILE_SYS_FLASH_OFFSET)
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+#define VERSATILE_SYS_CLCD (VERSATILE_SYS_BASE + VERSATILE_SYS_CLCD_OFFSET)
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+#define VERSATILE_SYS_CLCDSER (VERSATILE_SYS_BASE + VERSATILE_SYS_CLCDSER_OFFSET)
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+#define VERSATILE_SYS_BOOTCS (VERSATILE_SYS_BASE + VERSATILE_SYS_BOOTCS_OFFSET)
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+#define VERSATILE_SYS_24MHz (VERSATILE_SYS_BASE + VERSATILE_SYS_24MHz_OFFSET)
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+#define VERSATILE_SYS_MISC (VERSATILE_SYS_BASE + VERSATILE_SYS_MISC_OFFSET)
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+#define VERSATILE_SYS_TEST_OSC0 (VERSATILE_SYS_BASE + VERSATILE_SYS_TEST_OSC0_OFFSET)
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+#define VERSATILE_SYS_TEST_OSC1 (VERSATILE_SYS_BASE + VERSATILE_SYS_TEST_OSC1_OFFSET)
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+#define VERSATILE_SYS_TEST_OSC2 (VERSATILE_SYS_BASE + VERSATILE_SYS_TEST_OSC2_OFFSET)
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+#define VERSATILE_SYS_TEST_OSC3 (VERSATILE_SYS_BASE + VERSATILE_SYS_TEST_OSC3_OFFSET)
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+#define VERSATILE_SYS_TEST_OSC4 (VERSATILE_SYS_BASE + VERSATILE_SYS_TEST_OSC4_OFFSET)
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+
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+/*
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+ * Values for VERSATILE_SYS_RESET_CTRL
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+ */
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+#define VERSATILE_SYS_CTRL_RESET_CONFIGCLR 0x01
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+#define VERSATILE_SYS_CTRL_RESET_CONFIGINIT 0x02
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+#define VERSATILE_SYS_CTRL_RESET_DLLRESET 0x03
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+#define VERSATILE_SYS_CTRL_RESET_PLLRESET 0x04
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+#define VERSATILE_SYS_CTRL_RESET_POR 0x05
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+#define VERSATILE_SYS_CTRL_RESET_DoC 0x06
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+
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+#define VERSATILE_SYS_CTRL_LED (1 << 0)
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+
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+
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+/* ------------------------------------------------------------------------
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+ * Versatile control registers
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+ * ------------------------------------------------------------------------
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+ */
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+
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+/*
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+ * VERSATILE_IDFIELD
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+ *
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+ * 31:24 = manufacturer (0x41 = ARM)
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+ * 23:16 = architecture (0x08 = AHB system bus, ASB processor bus)
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+ * 15:12 = FPGA (0x3 = XVC600 or XVC600E)
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+ * 11:4 = build value
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+ * 3:0 = revision number (0x1 = rev B (AHB))
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+ */
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+
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+/*
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+ * VERSATILE_SYS_LOCK
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+ * control access to SYS_OSCx, SYS_CFGDATAx, SYS_RESETCTL,
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+ * SYS_CLD, SYS_BOOTCS
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+ */
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+#define VERSATILE_SYS_LOCK_LOCKED (1 << 16)
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+#define VERSATILE_SYS_LOCKVAL_MASK 0xFFFF /* write 0xA05F to enable write access */
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+
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+/*
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+ * VERSATILE_SYS_FLASH
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+ */
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+#define VERSATILE_FLASHPROG_FLVPPEN (1 << 0) /* Enable writing to flash */
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+
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+/*
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+ * VERSATILE_INTREG
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+ * - used to acknowledge and control MMCI and UART interrupts
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+ */
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+#define VERSATILE_INTREG_WPROT 0x00 /* MMC protection status (no interrupt generated) */
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+#define VERSATILE_INTREG_RI0 0x01 /* Ring indicator UART0 is asserted, */
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+#define VERSATILE_INTREG_CARDIN 0x08 /* MMCI card in detect */
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+ /* write 1 to acknowledge and clear */
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+#define VERSATILE_INTREG_RI1 0x02 /* Ring indicator UART1 is asserted, */
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+#define VERSATILE_INTREG_CARDINSERT 0x03 /* Signal insertion of MMC card */
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+
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+/*
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+ * VERSATILE peripheral addresses
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+ */
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+#define VERSATILE_PCI_CORE_BASE 0x10001000 /* PCI core control */
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+#define VERSATILE_I2C_BASE 0x10002000 /* I2C control */
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+#define VERSATILE_SIC_BASE 0x10003000 /* Secondary interrupt controller */
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+#define VERSATILE_AACI_BASE 0x10004000 /* Audio */
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+#define VERSATILE_MMCI0_BASE 0x10005000 /* MMC interface */
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+#define VERSATILE_KMI0_BASE 0x10006000 /* KMI interface */
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+#define VERSATILE_KMI1_BASE 0x10007000 /* KMI 2nd interface */
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+#define VERSATILE_CHAR_LCD_BASE 0x10008000 /* Character LCD */
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+#define VERSATILE_UART3_BASE 0x10009000 /* UART 3 */
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+#define VERSATILE_SCI1_BASE 0x1000A000
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+#define VERSATILE_MMCI1_BASE 0x1000B000 /* MMC Interface */
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+ /* 0x1000C000 - 0x1000CFFF = reserved */
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袁明明