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@@ -224,3 +224,86 @@ static inline void nile4_out16(u32 offset, u16 val)
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*(volatile u16 *)(NILE4_BASE+offset) = val;
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nile4_sync();
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}
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+
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+static inline u16 nile4_in16(u32 offset)
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+{
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+ u16 val = *(volatile u16 *)(NILE4_BASE+offset);
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+ nile4_sync();
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+ return val;
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+}
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+
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+static inline void nile4_out8(u32 offset, u8 val)
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+{
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+ *(volatile u8 *)(NILE4_BASE+offset) = val;
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+ nile4_sync();
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+}
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+
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+static inline u8 nile4_in8(u32 offset)
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+{
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+ u8 val = *(volatile u8 *)(NILE4_BASE+offset);
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+ nile4_sync();
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+ return val;
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+}
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+
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+
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+ /*
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+ * Physical Device Address Registers
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+ */
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+
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+extern void nile4_set_pdar(u32 pdar, u32 phys, u32 size, int width,
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+ int on_memory_bus, int visible);
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+
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+
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+ /*
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+ * PCI Master Registers
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+ */
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+
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+#define NILE4_PCICMD_IACK 0 /* PCI Interrupt Acknowledge */
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+#define NILE4_PCICMD_IO 1 /* PCI I/O Space */
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+#define NILE4_PCICMD_MEM 3 /* PCI Memory Space */
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+#define NILE4_PCICMD_CFG 5 /* PCI Configuration Space */
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+
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+
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+ /*
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+ * PCI Address Spaces
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+ *
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+ * Note that these are multiplexed using PCIINIT[01]!
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+ */
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+
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+#define NILE4_PCI_IO_BASE 0xa6000000
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+#define NILE4_PCI_MEM_BASE 0xa8000000
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+#define NILE4_PCI_CFG_BASE NILE4_PCI_MEM_BASE
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+#define NILE4_PCI_IACK_BASE NILE4_PCI_IO_BASE
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+
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+
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+extern void nile4_set_pmr(u32 pmr, u32 type, u32 addr);
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+
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+
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+ /*
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+ * Interrupt Programming
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+ */
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+
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+#define NUM_I8259_INTERRUPTS 16
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+#define NUM_NILE4_INTERRUPTS 16
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+
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+#define IRQ_I8259_CASCADE NILE4_INT_INTE
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+#define is_i8259_irq(irq) ((irq) < NUM_I8259_INTERRUPTS)
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+#define nile4_to_irq(n) ((n)+NUM_I8259_INTERRUPTS)
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+#define irq_to_nile4(n) ((n)-NUM_I8259_INTERRUPTS)
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+
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+extern void nile4_map_irq(int nile4_irq, int cpu_irq);
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+extern void nile4_map_irq_all(int cpu_irq);
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+extern void nile4_enable_irq(unsigned int nile4_irq);
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+extern void nile4_disable_irq(unsigned int nile4_irq);
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+extern void nile4_disable_irq_all(void);
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+extern u16 nile4_get_irq_stat(int cpu_irq);
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+extern void nile4_enable_irq_output(int cpu_irq);
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+extern void nile4_disable_irq_output(int cpu_irq);
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+extern void nile4_set_pci_irq_polarity(int pci_irq, int high);
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+extern void nile4_set_pci_irq_level_or_edge(int pci_irq, int level);
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+extern void nile4_clear_irq(int nile4_irq);
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+extern void nile4_clear_irq_mask(u32 mask);
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+extern u8 nile4_i8259_iack(void);
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+extern void nile4_dump_irq_status(void); /* Debug */
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+
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+#endif
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吉超博