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@@ -436,3 +436,183 @@ static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio3 = {
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.clk = "gpios_ick",
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.clk = "gpios_ick",
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.addr = omap2420_gpio3_addr_space,
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.addr = omap2420_gpio3_addr_space,
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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+};
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+
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+/* l4_wkup -> gpio4 */
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+static struct omap_hwmod_addr_space omap2420_gpio4_addr_space[] = {
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+ {
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+ .pa_start = 0x4801e000,
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+ .pa_end = 0x4801e1ff,
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+ .flags = ADDR_TYPE_RT
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+ },
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+ { }
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+};
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+
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+static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio4 = {
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+ .master = &omap2xxx_l4_wkup_hwmod,
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+ .slave = &omap2xxx_gpio4_hwmod,
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+ .clk = "gpios_ick",
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+ .addr = omap2420_gpio4_addr_space,
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+ .user = OCP_USER_MPU | OCP_USER_SDMA,
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+};
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+
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+/* dma_system -> L3 */
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+static struct omap_hwmod_ocp_if omap2420_dma_system__l3 = {
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+ .master = &omap2420_dma_system_hwmod,
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+ .slave = &omap2xxx_l3_main_hwmod,
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+ .clk = "core_l3_ck",
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+ .user = OCP_USER_MPU | OCP_USER_SDMA,
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+};
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+
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+/* l4_core -> dma_system */
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+static struct omap_hwmod_ocp_if omap2420_l4_core__dma_system = {
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+ .master = &omap2xxx_l4_core_hwmod,
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+ .slave = &omap2420_dma_system_hwmod,
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+ .clk = "sdma_ick",
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+ .addr = omap2_dma_system_addrs,
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+ .user = OCP_USER_MPU | OCP_USER_SDMA,
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+};
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+
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+/* l4_core -> mailbox */
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+static struct omap_hwmod_ocp_if omap2420_l4_core__mailbox = {
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+ .master = &omap2xxx_l4_core_hwmod,
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+ .slave = &omap2420_mailbox_hwmod,
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+ .addr = omap2_mailbox_addrs,
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+ .user = OCP_USER_MPU | OCP_USER_SDMA,
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+};
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+
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+/* l4_core -> mcbsp1 */
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+static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp1 = {
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+ .master = &omap2xxx_l4_core_hwmod,
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+ .slave = &omap2420_mcbsp1_hwmod,
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+ .clk = "mcbsp1_ick",
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+ .addr = omap2_mcbsp1_addrs,
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+ .user = OCP_USER_MPU | OCP_USER_SDMA,
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+};
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+
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+/* l4_core -> mcbsp2 */
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+static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp2 = {
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+ .master = &omap2xxx_l4_core_hwmod,
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+ .slave = &omap2420_mcbsp2_hwmod,
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+ .clk = "mcbsp2_ick",
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+ .addr = omap2xxx_mcbsp2_addrs,
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+ .user = OCP_USER_MPU | OCP_USER_SDMA,
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+};
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+
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+static struct omap_hwmod_addr_space omap2420_msdi1_addrs[] = {
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+ {
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+ .pa_start = 0x4809c000,
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+ .pa_end = 0x4809c000 + SZ_128 - 1,
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+ .flags = ADDR_TYPE_RT,
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+ },
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+ { }
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+};
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+
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+/* l4_core -> msdi1 */
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+static struct omap_hwmod_ocp_if omap2420_l4_core__msdi1 = {
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+ .master = &omap2xxx_l4_core_hwmod,
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+ .slave = &omap2420_msdi1_hwmod,
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+ .clk = "mmc_ick",
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+ .addr = omap2420_msdi1_addrs,
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+ .user = OCP_USER_MPU | OCP_USER_SDMA,
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+};
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+
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+/* l4_core -> hdq1w interface */
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+static struct omap_hwmod_ocp_if omap2420_l4_core__hdq1w = {
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+ .master = &omap2xxx_l4_core_hwmod,
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+ .slave = &omap2420_hdq1w_hwmod,
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+ .clk = "hdq_ick",
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+ .addr = omap2_hdq1w_addr_space,
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+ .user = OCP_USER_MPU | OCP_USER_SDMA,
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+ .flags = OMAP_FIREWALL_L4 | OCPIF_SWSUP_IDLE,
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+};
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+
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+
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+/* l4_wkup -> 32ksync_counter */
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+static struct omap_hwmod_addr_space omap2420_counter_32k_addrs[] = {
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+ {
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+ .pa_start = 0x48004000,
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+ .pa_end = 0x4800401f,
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+ .flags = ADDR_TYPE_RT
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+ },
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+ { }
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+};
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+
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+static struct omap_hwmod_addr_space omap2420_gpmc_addrs[] = {
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+ {
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+ .pa_start = 0x6800a000,
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+ .pa_end = 0x6800afff,
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+ .flags = ADDR_TYPE_RT
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+ },
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+ { }
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+};
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+
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+static struct omap_hwmod_ocp_if omap2420_l4_wkup__counter_32k = {
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+ .master = &omap2xxx_l4_wkup_hwmod,
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+ .slave = &omap2xxx_counter_32k_hwmod,
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+ .clk = "sync_32k_ick",
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+ .addr = omap2420_counter_32k_addrs,
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+ .user = OCP_USER_MPU | OCP_USER_SDMA,
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+};
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+
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+static struct omap_hwmod_ocp_if omap2420_l3__gpmc = {
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+ .master = &omap2xxx_l3_main_hwmod,
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+ .slave = &omap2xxx_gpmc_hwmod,
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+ .clk = "core_l3_ck",
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+ .addr = omap2420_gpmc_addrs,
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+ .user = OCP_USER_MPU | OCP_USER_SDMA,
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+};
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+
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+static struct omap_hwmod_ocp_if *omap2420_hwmod_ocp_ifs[] __initdata = {
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+ &omap2xxx_l3_main__l4_core,
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+ &omap2xxx_mpu__l3_main,
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+ &omap2xxx_dss__l3,
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+ &omap2xxx_l4_core__mcspi1,
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+ &omap2xxx_l4_core__mcspi2,
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+ &omap2xxx_l4_core__l4_wkup,
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+ &omap2_l4_core__uart1,
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+ &omap2_l4_core__uart2,
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+ &omap2_l4_core__uart3,
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+ &omap2420_l4_core__i2c1,
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+ &omap2420_l4_core__i2c2,
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+ &omap2420_l3__iva,
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+ &omap2420_l3__dsp,
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+ &omap2420_l4_wkup__timer1,
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+ &omap2xxx_l4_core__timer2,
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+ &omap2xxx_l4_core__timer3,
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+ &omap2xxx_l4_core__timer4,
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+ &omap2xxx_l4_core__timer5,
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+ &omap2xxx_l4_core__timer6,
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+ &omap2xxx_l4_core__timer7,
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+ &omap2xxx_l4_core__timer8,
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+ &omap2xxx_l4_core__timer9,
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+ &omap2xxx_l4_core__timer10,
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+ &omap2xxx_l4_core__timer11,
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+ &omap2xxx_l4_core__timer12,
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+ &omap2420_l4_wkup__wd_timer2,
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+ &omap2xxx_l4_core__dss,
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+ &omap2xxx_l4_core__dss_dispc,
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+ &omap2xxx_l4_core__dss_rfbi,
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+ &omap2xxx_l4_core__dss_venc,
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+ &omap2420_l4_wkup__gpio1,
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+ &omap2420_l4_wkup__gpio2,
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+ &omap2420_l4_wkup__gpio3,
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+ &omap2420_l4_wkup__gpio4,
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+ &omap2420_dma_system__l3,
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+ &omap2420_l4_core__dma_system,
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+ &omap2420_l4_core__mailbox,
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+ &omap2420_l4_core__mcbsp1,
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+ &omap2420_l4_core__mcbsp2,
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+ &omap2420_l4_core__msdi1,
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+ &omap2xxx_l4_core__rng,
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+ &omap2420_l4_core__hdq1w,
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+ &omap2420_l4_wkup__counter_32k,
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+ &omap2420_l3__gpmc,
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+ NULL,
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+};
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+
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+int __init omap2420_hwmod_init(void)
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+{
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+ omap_hwmod_init();
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+ return omap_hwmod_register_links(omap2420_hwmod_ocp_ifs);
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+}
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