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@@ -715,3 +715,76 @@ static struct platform_device usb_dma0_device = {
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/* USB DMAC1 */
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static const struct sh_dmae_slave_config sh7372_usb_dmae1_slaves[] = {
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{
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+ .slave_id = SHDMA_SLAVE_USB1_TX,
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+ .chcr = USBTS_INDEX2VAL(USBTS_XMIT_SZ_8BYTE),
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+ }, {
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+ .slave_id = SHDMA_SLAVE_USB1_RX,
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+ .chcr = USBTS_INDEX2VAL(USBTS_XMIT_SZ_8BYTE),
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+ },
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+};
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+
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+static struct sh_dmae_pdata usb_dma1_platform_data = {
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+ .slave = sh7372_usb_dmae1_slaves,
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+ .slave_num = ARRAY_SIZE(sh7372_usb_dmae1_slaves),
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+ .channel = sh7372_usb_dmae_channels,
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+ .channel_num = ARRAY_SIZE(sh7372_usb_dmae_channels),
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+ .ts_low_shift = USBTS_LOW_SHIFT,
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+ .ts_low_mask = USBTS_LOW_BIT << USBTS_LOW_SHIFT,
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+ .ts_high_shift = USBTS_HI_SHIFT,
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+ .ts_high_mask = USBTS_HI_BIT << USBTS_HI_SHIFT,
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+ .ts_shift = dma_usbts_shift,
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+ .ts_shift_num = ARRAY_SIZE(dma_usbts_shift),
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+ .dmaor_init = DMAOR_DME,
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+ .chcr_offset = 0x14,
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+ .chcr_ie_bit = 1 << 5,
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+ .dmaor_is_32bit = 1,
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+ .needs_tend_set = 1,
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+ .no_dmars = 1,
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+ .slave_only = 1,
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+};
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+
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+static struct resource sh7372_usb_dmae1_resources[] = {
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+ {
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+ /* Channel registers and DMAOR */
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+ .start = 0xe68c0020,
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+ .end = 0xe68c0064 - 1,
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+ .flags = IORESOURCE_MEM,
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+ },
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+ {
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+ /* VCR/SWR/DMICR */
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+ .start = 0xe68c0000,
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+ .end = 0xe68c0014 - 1,
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+ .flags = IORESOURCE_MEM,
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+ },
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+ {
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+ /* IRQ for channels */
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+ .start = evt2irq(0x1d00),
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+ .end = evt2irq(0x1d00),
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+ .flags = IORESOURCE_IRQ,
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+ },
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+};
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+
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+static struct platform_device usb_dma1_device = {
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+ .name = "sh-dma-engine",
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+ .id = 4,
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+ .resource = sh7372_usb_dmae1_resources,
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+ .num_resources = ARRAY_SIZE(sh7372_usb_dmae1_resources),
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+ .dev = {
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+ .platform_data = &usb_dma1_platform_data,
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+ },
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+};
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+
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+/* VPU */
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+static struct uio_info vpu_platform_data = {
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+ .name = "VPU5HG",
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+ .version = "0",
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+ .irq = intcs_evt2irq(0x980),
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+};
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+
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+static struct resource vpu_resources[] = {
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+ [0] = {
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+ .name = "VPU",
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+ .start = 0xfe900000,
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+ .end = 0xfe900157,
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+ .flags = IORESOURCE_MEM,
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+ },
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