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				|  |  | +/*
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				|  |  | + * linux/arch/arm/mach-sa1100/neponset.c
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				|  |  | + */
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				|  |  | +#include <linux/err.h>
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				|  |  | +#include <linux/init.h>
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				|  |  | +#include <linux/ioport.h>
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				|  |  | +#include <linux/irq.h>
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				|  |  | +#include <linux/kernel.h>
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				|  |  | +#include <linux/module.h>
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				|  |  | +#include <linux/platform_data/sa11x0-serial.h>
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				|  |  | +#include <linux/platform_device.h>
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				|  |  | +#include <linux/pm.h>
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				|  |  | +#include <linux/serial_core.h>
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				|  |  | +#include <linux/slab.h>
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				|  |  | +
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				|  |  | +#include <asm/mach-types.h>
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				|  |  | +#include <asm/mach/map.h>
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				|  |  | +#include <asm/hardware/sa1111.h>
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				|  |  | +#include <asm/sizes.h>
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				|  |  | +
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				|  |  | +#include <mach/hardware.h>
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				|  |  | +#include <mach/assabet.h>
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				|  |  | +#include <mach/neponset.h>
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				|  |  | +#include <mach/irqs.h>
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				|  |  | +
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				|  |  | +#define NEP_IRQ_SMC91X	0
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				|  |  | +#define NEP_IRQ_USAR	1
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				|  |  | +#define NEP_IRQ_SA1111	2
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				|  |  | +#define NEP_IRQ_NR	3
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				|  |  | +
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				|  |  | +#define WHOAMI		0x00
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				|  |  | +#define LEDS		0x10
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				|  |  | +#define SWPK		0x20
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				|  |  | +#define IRR		0x24
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				|  |  | +#define KP_Y_IN		0x80
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				|  |  | +#define KP_X_OUT	0x90
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				|  |  | +#define NCR_0		0xa0
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				|  |  | +#define MDM_CTL_0	0xb0
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				|  |  | +#define MDM_CTL_1	0xb4
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				|  |  | +#define AUD_CTL		0xc0
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				|  |  | +
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				|  |  | +#define IRR_ETHERNET	(1 << 0)
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				|  |  | +#define IRR_USAR	(1 << 1)
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				|  |  | +#define IRR_SA1111	(1 << 2)
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				|  |  | +
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				|  |  | +#define MDM_CTL0_RTS1	(1 << 0)
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				|  |  | +#define MDM_CTL0_DTR1	(1 << 1)
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				|  |  | +#define MDM_CTL0_RTS2	(1 << 2)
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				|  |  | +#define MDM_CTL0_DTR2	(1 << 3)
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				|  |  | +
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				|  |  | +#define MDM_CTL1_CTS1	(1 << 0)
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				|  |  | +#define MDM_CTL1_DSR1	(1 << 1)
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				|  |  | +#define MDM_CTL1_DCD1	(1 << 2)
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				|  |  | +#define MDM_CTL1_CTS2	(1 << 3)
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				|  |  | +#define MDM_CTL1_DSR2	(1 << 4)
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				|  |  | +#define MDM_CTL1_DCD2	(1 << 5)
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				|  |  | +
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				|  |  | +#define AUD_SEL_1341	(1 << 0)
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				|  |  | +#define AUD_MUTE_1341	(1 << 1)
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				|  |  | +
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				|  |  | +extern void sa1110_mb_disable(void);
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				|  |  | +
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				|  |  | +struct neponset_drvdata {
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				|  |  | +	void __iomem *base;
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				|  |  | +	struct platform_device *sa1111;
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				|  |  | +	struct platform_device *smc91x;
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				|  |  | +	unsigned irq_base;
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				|  |  | +#ifdef CONFIG_PM_SLEEP
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				|  |  | +	u32 ncr0;
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				|  |  | +	u32 mdm_ctl_0;
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				|  |  | +#endif
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				|  |  | +};
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				|  |  | +
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				|  |  | +static void __iomem *nep_base;
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				|  |  | +
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				|  |  | +void neponset_ncr_frob(unsigned int mask, unsigned int val)
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				|  |  | +{
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				|  |  | +	void __iomem *base = nep_base;
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				|  |  | +
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				|  |  | +	if (base) {
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				|  |  | +		unsigned long flags;
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				|  |  | +		unsigned v;
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				|  |  | +
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				|  |  | +		local_irq_save(flags);
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				|  |  | +		v = readb_relaxed(base + NCR_0);
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				|  |  | +		writeb_relaxed((v & ~mask) | val, base + NCR_0);
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				|  |  | +		local_irq_restore(flags);
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				|  |  | +	} else {
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				|  |  | +		WARN(1, "nep_base unset\n");
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				|  |  | +	}
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				|  |  | +}
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				|  |  | +EXPORT_SYMBOL(neponset_ncr_frob);
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				|  |  | +
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				|  |  | +static void neponset_set_mctrl(struct uart_port *port, u_int mctrl)
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				|  |  | +{
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				|  |  | +	void __iomem *base = nep_base;
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				|  |  | +	u_int mdm_ctl0;
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				|  |  | +
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				|  |  | +	if (!base)
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				|  |  | +		return;
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				|  |  | +
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				|  |  | +	mdm_ctl0 = readb_relaxed(base + MDM_CTL_0);
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				|  |  | +	if (port->mapbase == _Ser1UTCR0) {
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				|  |  | +		if (mctrl & TIOCM_RTS)
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				|  |  | +			mdm_ctl0 &= ~MDM_CTL0_RTS2;
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				|  |  | +		else
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				|  |  | +			mdm_ctl0 |= MDM_CTL0_RTS2;
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				|  |  | +
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				|  |  | +		if (mctrl & TIOCM_DTR)
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				|  |  | +			mdm_ctl0 &= ~MDM_CTL0_DTR2;
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				|  |  | +		else
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				|  |  | +			mdm_ctl0 |= MDM_CTL0_DTR2;
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				|  |  | +	} else if (port->mapbase == _Ser3UTCR0) {
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				|  |  | +		if (mctrl & TIOCM_RTS)
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				|  |  | +			mdm_ctl0 &= ~MDM_CTL0_RTS1;
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				|  |  | +		else
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				|  |  | +			mdm_ctl0 |= MDM_CTL0_RTS1;
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				|  |  | +
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				|  |  | +		if (mctrl & TIOCM_DTR)
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				|  |  | +			mdm_ctl0 &= ~MDM_CTL0_DTR1;
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