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@@ -373,3 +373,36 @@ static struct irqaction sh73a0_irq_pin_cascade[32];
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#define PINTRR0 IOMEM(0xe69000d0)
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#define PINTRR1 IOMEM(0xe69000d4)
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+#define PINT0A_IRQ(n, irq) INTC_IRQ((n), SH73A0_PINT0_IRQ(irq))
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+#define PINT0B_IRQ(n, irq) INTC_IRQ((n), SH73A0_PINT0_IRQ(irq + 8))
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+#define PINT0C_IRQ(n, irq) INTC_IRQ((n), SH73A0_PINT0_IRQ(irq + 16))
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+#define PINT0D_IRQ(n, irq) INTC_IRQ((n), SH73A0_PINT0_IRQ(irq + 24))
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+#define PINT1E_IRQ(n, irq) INTC_IRQ((n), SH73A0_PINT1_IRQ(irq))
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+
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+INTC_PINT(intc_pint0, PINTER0_PHYS, 0xe69000b0, "sh73a0-pint0", \
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+ INTC_PINT_E(A), INTC_PINT_E(B), INTC_PINT_E(C), INTC_PINT_E(D), \
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+ INTC_PINT_V(A, PINT0A_IRQ), INTC_PINT_V(B, PINT0B_IRQ), \
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+ INTC_PINT_V(C, PINT0C_IRQ), INTC_PINT_V(D, PINT0D_IRQ), \
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+ INTC_PINT_E(A), INTC_PINT_E(B), INTC_PINT_E(C), INTC_PINT_E(D), \
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+ INTC_PINT_E(A), INTC_PINT_E(B), INTC_PINT_E(C), INTC_PINT_E(D));
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+
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+INTC_PINT(intc_pint1, PINTER1_PHYS, 0xe69000c0, "sh73a0-pint1", \
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+ INTC_PINT_E(E), INTC_PINT_E_EMPTY, INTC_PINT_E_EMPTY, INTC_PINT_E_EMPTY, \
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+ INTC_PINT_V(E, PINT1E_IRQ), INTC_PINT_V_NONE, \
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+ INTC_PINT_V_NONE, INTC_PINT_V_NONE, \
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+ INTC_PINT_E_NONE, INTC_PINT_E_NONE, INTC_PINT_E_NONE, INTC_PINT_E(E), \
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+ INTC_PINT_E(E), INTC_PINT_E_NONE, INTC_PINT_E_NONE, INTC_PINT_E_NONE);
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+
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+static struct irqaction sh73a0_pint0_cascade;
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+static struct irqaction sh73a0_pint1_cascade;
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+
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+static void pint_demux(void __iomem *rr, void __iomem *er, int base_irq)
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+{
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+ unsigned long value = ioread32(rr) & ioread32(er);
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+ int k;
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+
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+ for (k = 0; k < 32; k++) {
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+ if (value & (1 << (31 - k))) {
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+ generic_handle_irq(base_irq + k);
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+ iowrite32(~(1 << (31 - k)), rr);
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+ }
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