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@@ -323,3 +323,147 @@ IS_OMAP_TYPE(3430, 0x3430)
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# define cpu_is_ti81xx() is_ti81xx()
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# define cpu_is_ti81xx() is_ti81xx()
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# define cpu_is_ti816x() is_ti816x()
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# define cpu_is_ti816x() is_ti816x()
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# define cpu_is_ti814x() is_ti814x()
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# define cpu_is_ti814x() is_ti814x()
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+# define soc_is_am35xx() is_am35xx()
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+#endif
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+
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+# if defined(CONFIG_SOC_AM33XX)
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+# undef soc_is_am33xx
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+# undef soc_is_am335x
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+# define soc_is_am33xx() is_am33xx()
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+# define soc_is_am335x() is_am335x()
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+#endif
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+
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+# if defined(CONFIG_ARCH_OMAP4)
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+# undef cpu_is_omap44xx
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+# undef cpu_is_omap443x
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+# undef cpu_is_omap446x
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+# undef cpu_is_omap447x
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+# define cpu_is_omap44xx() is_omap44xx()
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+# define cpu_is_omap443x() is_omap443x()
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+# define cpu_is_omap446x() is_omap446x()
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+# define cpu_is_omap447x() is_omap447x()
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+# endif
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+
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+# if defined(CONFIG_SOC_OMAP5)
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+# undef soc_is_omap54xx
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+# undef soc_is_omap543x
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+# define soc_is_omap54xx() is_omap54xx()
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+# define soc_is_omap543x() is_omap543x()
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+#endif
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+
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+/* Various silicon revisions for omap2 */
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+#define OMAP242X_CLASS 0x24200024
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+#define OMAP2420_REV_ES1_0 OMAP242X_CLASS
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+#define OMAP2420_REV_ES2_0 (OMAP242X_CLASS | (0x1 << 8))
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+
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+#define OMAP243X_CLASS 0x24300024
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+#define OMAP2430_REV_ES1_0 OMAP243X_CLASS
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+
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+#define OMAP343X_CLASS 0x34300034
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+#define OMAP3430_REV_ES1_0 OMAP343X_CLASS
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+#define OMAP3430_REV_ES2_0 (OMAP343X_CLASS | (0x1 << 8))
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+#define OMAP3430_REV_ES2_1 (OMAP343X_CLASS | (0x2 << 8))
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+#define OMAP3430_REV_ES3_0 (OMAP343X_CLASS | (0x3 << 8))
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+#define OMAP3430_REV_ES3_1 (OMAP343X_CLASS | (0x4 << 8))
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+#define OMAP3430_REV_ES3_1_2 (OMAP343X_CLASS | (0x5 << 8))
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+
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+#define OMAP363X_CLASS 0x36300034
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+#define OMAP3630_REV_ES1_0 OMAP363X_CLASS
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+#define OMAP3630_REV_ES1_1 (OMAP363X_CLASS | (0x1 << 8))
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+#define OMAP3630_REV_ES1_2 (OMAP363X_CLASS | (0x2 << 8))
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+
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+#define TI816X_CLASS 0x81600034
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+#define TI8168_REV_ES1_0 TI816X_CLASS
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+#define TI8168_REV_ES1_1 (TI816X_CLASS | (0x1 << 8))
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+
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+#define TI814X_CLASS 0x81400034
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+#define TI8148_REV_ES1_0 TI814X_CLASS
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+#define TI8148_REV_ES2_0 (TI814X_CLASS | (0x1 << 8))
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+#define TI8148_REV_ES2_1 (TI814X_CLASS | (0x2 << 8))
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+
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+#define AM35XX_CLASS 0x35170034
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+#define AM35XX_REV_ES1_0 AM35XX_CLASS
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+#define AM35XX_REV_ES1_1 (AM35XX_CLASS | (0x1 << 8))
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+
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+#define AM335X_CLASS 0x33500033
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+#define AM335X_REV_ES1_0 AM335X_CLASS
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+
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+#define OMAP443X_CLASS 0x44300044
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+#define OMAP4430_REV_ES1_0 (OMAP443X_CLASS | (0x10 << 8))
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+#define OMAP4430_REV_ES2_0 (OMAP443X_CLASS | (0x20 << 8))
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+#define OMAP4430_REV_ES2_1 (OMAP443X_CLASS | (0x21 << 8))
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+#define OMAP4430_REV_ES2_2 (OMAP443X_CLASS | (0x22 << 8))
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+#define OMAP4430_REV_ES2_3 (OMAP443X_CLASS | (0x23 << 8))
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+
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+#define OMAP446X_CLASS 0x44600044
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+#define OMAP4460_REV_ES1_0 (OMAP446X_CLASS | (0x10 << 8))
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+#define OMAP4460_REV_ES1_1 (OMAP446X_CLASS | (0x11 << 8))
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+
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+#define OMAP447X_CLASS 0x44700044
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+#define OMAP4470_REV_ES1_0 (OMAP447X_CLASS | (0x10 << 8))
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+
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+#define OMAP54XX_CLASS 0x54000054
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+#define OMAP5430_REV_ES1_0 (OMAP54XX_CLASS | (0x30 << 16) | (0x10 << 8))
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+#define OMAP5432_REV_ES1_0 (OMAP54XX_CLASS | (0x32 << 16) | (0x10 << 8))
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+
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+void omap2xxx_check_revision(void);
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+void omap3xxx_check_revision(void);
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+void omap4xxx_check_revision(void);
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+void omap5xxx_check_revision(void);
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+void omap3xxx_check_features(void);
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+void ti81xx_check_features(void);
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+void omap4xxx_check_features(void);
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+
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+/*
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+ * Runtime detection of OMAP3 features
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+ *
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+ * OMAP3_HAS_IO_CHAIN_CTRL: Some later members of the OMAP3 chip
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+ * family have OS-level control over the I/O chain clock. This is
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+ * to avoid a window during which wakeups could potentially be lost
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+ * during powerdomain transitions. If this bit is set, it
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+ * indicates that the chip does support OS-level control of this
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+ * feature.
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+ */
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+extern u32 omap_features;
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+
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+#define OMAP3_HAS_L2CACHE BIT(0)
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+#define OMAP3_HAS_IVA BIT(1)
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+#define OMAP3_HAS_SGX BIT(2)
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+#define OMAP3_HAS_NEON BIT(3)
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+#define OMAP3_HAS_ISP BIT(4)
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+#define OMAP3_HAS_192MHZ_CLK BIT(5)
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+#define OMAP3_HAS_IO_WAKEUP BIT(6)
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+#define OMAP3_HAS_SDRC BIT(7)
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+#define OMAP3_HAS_IO_CHAIN_CTRL BIT(8)
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+#define OMAP4_HAS_PERF_SILICON BIT(9)
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+
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+
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+#define OMAP3_HAS_FEATURE(feat,flag) \
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+static inline unsigned int omap3_has_ ##feat(void) \
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+{ \
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+ return omap_features & OMAP3_HAS_ ##flag; \
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+} \
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+
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+OMAP3_HAS_FEATURE(l2cache, L2CACHE)
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+OMAP3_HAS_FEATURE(sgx, SGX)
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+OMAP3_HAS_FEATURE(iva, IVA)
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+OMAP3_HAS_FEATURE(neon, NEON)
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+OMAP3_HAS_FEATURE(isp, ISP)
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+OMAP3_HAS_FEATURE(192mhz_clk, 192MHZ_CLK)
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+OMAP3_HAS_FEATURE(io_wakeup, IO_WAKEUP)
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+OMAP3_HAS_FEATURE(sdrc, SDRC)
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+OMAP3_HAS_FEATURE(io_chain_ctrl, IO_CHAIN_CTRL)
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+
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+/*
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+ * Runtime detection of OMAP4 features
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+ */
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+#define OMAP4_HAS_FEATURE(feat, flag) \
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+static inline unsigned int omap4_has_ ##feat(void) \
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+{ \
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+ return omap_features & OMAP4_HAS_ ##flag; \
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+} \
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+
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+OMAP4_HAS_FEATURE(perf_silicon, PERF_SILICON)
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+
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+#endif /* __ASSEMBLY__ */
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+
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