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@@ -197,3 +197,77 @@ struct fb_clut {
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__u32 clutid;
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__u32 offset;
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__u32 count;
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+ char * red;
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+ char * green;
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+ char * blue;
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+};
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+
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+struct fb_clut32 {
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+ __u32 flag;
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+ __u32 clutid;
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+ __u32 offset;
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+ __u32 count;
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+ __u32 red;
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+ __u32 green;
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+ __u32 blue;
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+};
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+
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+#define LEO_CLUTALLOC _IOWR('L', 53, struct fb_clut_alloc)
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+#define LEO_CLUTFREE _IOW('L', 54, struct fb_clut_alloc)
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+#define LEO_CLUTREAD _IOW('L', 55, struct fb_clut)
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+#define LEO_CLUTPOST _IOW('L', 56, struct fb_clut)
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+#define LEO_SETGAMMA _IOW('L', 68, int) /* Not yet implemented */
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+#define LEO_GETGAMMA _IOR('L', 69, int) /* Not yet implemented */
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+
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+#ifdef __KERNEL__
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+/* Addresses on the fd of a cgsix that are mappable */
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+#define CG6_FBC 0x70000000
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+#define CG6_TEC 0x70001000
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+#define CG6_BTREGS 0x70002000
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+#define CG6_FHC 0x70004000
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+#define CG6_THC 0x70005000
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+#define CG6_ROM 0x70006000
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+#define CG6_RAM 0x70016000
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+#define CG6_DHC 0x80000000
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+
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+#define CG3_MMAP_OFFSET 0x4000000
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+
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+/* Addresses on the fd of a tcx that are mappable */
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+#define TCX_RAM8BIT 0x00000000
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+#define TCX_RAM24BIT 0x01000000
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+#define TCX_UNK3 0x10000000
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+#define TCX_UNK4 0x20000000
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+#define TCX_CONTROLPLANE 0x28000000
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+#define TCX_UNK6 0x30000000
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+#define TCX_UNK7 0x38000000
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+#define TCX_TEC 0x70000000
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+#define TCX_BTREGS 0x70002000
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+#define TCX_THC 0x70004000
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+#define TCX_DHC 0x70008000
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+#define TCX_ALT 0x7000a000
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+#define TCX_SYNC 0x7000e000
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+#define TCX_UNK2 0x70010000
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+
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+/* CG14 definitions */
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+
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+/* Offsets into the OBIO space: */
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+#define CG14_REGS 0 /* registers */
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+#define CG14_CURSORREGS 0x1000 /* cursor registers */
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+#define CG14_DACREGS 0x2000 /* DAC registers */
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+#define CG14_XLUT 0x3000 /* X Look Up Table -- ??? */
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+#define CG14_CLUT1 0x4000 /* Color Look Up Table */
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+#define CG14_CLUT2 0x5000 /* Color Look Up Table */
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+#define CG14_CLUT3 0x6000 /* Color Look Up Table */
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+#define CG14_AUTO 0xf000
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+
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+#endif /* KERNEL */
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+
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+/* These are exported to userland for applications to use */
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+/* Mappable offsets for the cg14: control registers */
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+#define MDI_DIRECT_MAP 0x10000000
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+#define MDI_CTLREG_MAP 0x20000000
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+#define MDI_CURSOR_MAP 0x30000000
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+#define MDI_SHDW_VRT_MAP 0x40000000
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+
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+/* Mappable offsets for the cg14: frame buffer resolutions */
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+/* 32 bits */
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李欣儒