|
@@ -0,0 +1,103 @@
|
|
|
+/*
|
|
|
+ * omap_hwmod_3xxx_data.c - hardware modules present on the OMAP3xxx chips
|
|
|
+ *
|
|
|
+ * Copyright (C) 2009-2011 Nokia Corporation
|
|
|
+ * Copyright (C) 2012 Texas Instruments, Inc.
|
|
|
+ * Paul Walmsley
|
|
|
+ *
|
|
|
+ * This program is free software; you can redistribute it and/or modify
|
|
|
+ * it under the terms of the GNU General Public License version 2 as
|
|
|
+ * published by the Free Software Foundation.
|
|
|
+ *
|
|
|
+ * The data in this file should be completely autogeneratable from
|
|
|
+ * the TI hardware database or other technical documentation.
|
|
|
+ *
|
|
|
+ * XXX these should be marked initdata for multi-OMAP kernels
|
|
|
+ */
|
|
|
+
|
|
|
+#include <linux/i2c-omap.h>
|
|
|
+#include <linux/power/smartreflex.h>
|
|
|
+#include <linux/platform_data/gpio-omap.h>
|
|
|
+
|
|
|
+#include <linux/omap-dma.h>
|
|
|
+#include "l3_3xxx.h"
|
|
|
+#include "l4_3xxx.h"
|
|
|
+#include <linux/platform_data/asoc-ti-mcbsp.h>
|
|
|
+#include <linux/platform_data/spi-omap2-mcspi.h>
|
|
|
+#include <linux/platform_data/iommu-omap.h>
|
|
|
+#include <plat/dmtimer.h>
|
|
|
+
|
|
|
+#include "am35xx.h"
|
|
|
+
|
|
|
+#include "soc.h"
|
|
|
+#include "omap_hwmod.h"
|
|
|
+#include "omap_hwmod_common_data.h"
|
|
|
+#include "prm-regbits-34xx.h"
|
|
|
+#include "cm-regbits-34xx.h"
|
|
|
+
|
|
|
+#include "dma.h"
|
|
|
+#include "i2c.h"
|
|
|
+#include "mmc.h"
|
|
|
+#include "wd_timer.h"
|
|
|
+#include "serial.h"
|
|
|
+
|
|
|
+/*
|
|
|
+ * OMAP3xxx hardware module integration data
|
|
|
+ *
|
|
|
+ * All of the data in this section should be autogeneratable from the
|
|
|
+ * TI hardware database or other technical documentation. Data that
|
|
|
+ * is driver-specific or driver-kernel integration-specific belongs
|
|
|
+ * elsewhere.
|
|
|
+ */
|
|
|
+
|
|
|
+/*
|
|
|
+ * IP blocks
|
|
|
+ */
|
|
|
+
|
|
|
+/* L3 */
|
|
|
+static struct omap_hwmod_irq_info omap3xxx_l3_main_irqs[] = {
|
|
|
+ { .irq = 9 + OMAP_INTC_START, },
|
|
|
+ { .irq = 10 + OMAP_INTC_START, },
|
|
|
+ { .irq = -1 },
|
|
|
+};
|
|
|
+
|
|
|
+static struct omap_hwmod omap3xxx_l3_main_hwmod = {
|
|
|
+ .name = "l3_main",
|
|
|
+ .class = &l3_hwmod_class,
|
|
|
+ .mpu_irqs = omap3xxx_l3_main_irqs,
|
|
|
+ .flags = HWMOD_NO_IDLEST,
|
|
|
+};
|
|
|
+
|
|
|
+/* L4 CORE */
|
|
|
+static struct omap_hwmod omap3xxx_l4_core_hwmod = {
|
|
|
+ .name = "l4_core",
|
|
|
+ .class = &l4_hwmod_class,
|
|
|
+ .flags = HWMOD_NO_IDLEST,
|
|
|
+};
|
|
|
+
|
|
|
+/* L4 PER */
|
|
|
+static struct omap_hwmod omap3xxx_l4_per_hwmod = {
|
|
|
+ .name = "l4_per",
|
|
|
+ .class = &l4_hwmod_class,
|
|
|
+ .flags = HWMOD_NO_IDLEST,
|
|
|
+};
|
|
|
+
|
|
|
+/* L4 WKUP */
|
|
|
+static struct omap_hwmod omap3xxx_l4_wkup_hwmod = {
|
|
|
+ .name = "l4_wkup",
|
|
|
+ .class = &l4_hwmod_class,
|
|
|
+ .flags = HWMOD_NO_IDLEST,
|
|
|
+};
|
|
|
+
|
|
|
+/* L4 SEC */
|
|
|
+static struct omap_hwmod omap3xxx_l4_sec_hwmod = {
|
|
|
+ .name = "l4_sec",
|
|
|
+ .class = &l4_hwmod_class,
|
|
|
+ .flags = HWMOD_NO_IDLEST,
|
|
|
+};
|
|
|
+
|
|
|
+/* MPU */
|
|
|
+static struct omap_hwmod_irq_info omap3xxx_mpu_irqs[] = {
|
|
|
+ { .name = "pmu", .irq = 3 + OMAP_INTC_START },
|
|
|
+ { .irq = -1 }
|
|
|
+};
|