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+/*
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+ * arch/arm/mach-orion5x/db88f5281-setup.c
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+ *
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+ * Marvell Orion-2 Development Board Setup
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+ *
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+ * Maintainer: Tzachi Perelstein <tzachi@marvell.com>
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+ *
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+ * This file is licensed under the terms of the GNU General Public
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+ * License version 2. This program is licensed "as is" without any
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+ * warranty of any kind, whether express or implied.
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+ */
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+#include <linux/gpio.h>
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+#include <linux/kernel.h>
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+#include <linux/init.h>
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+#include <linux/platform_device.h>
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+#include <linux/pci.h>
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+#include <linux/irq.h>
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+#include <linux/mtd/physmap.h>
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+#include <linux/mtd/nand.h>
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+#include <linux/timer.h>
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+#include <linux/mv643xx_eth.h>
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+#include <linux/i2c.h>
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+#include <asm/mach-types.h>
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+#include <asm/mach/arch.h>
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+#include <asm/mach/pci.h>
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+#include <mach/orion5x.h>
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+#include <linux/platform_data/mtd-orion_nand.h>
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+#include "common.h"
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+#include "mpp.h"
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+
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+/*****************************************************************************
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+ * DB-88F5281 on board devices
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+ ****************************************************************************/
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+
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+/*
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+ * 512K NOR flash Device bus boot chip select
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+ */
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+
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+#define DB88F5281_NOR_BOOT_BASE 0xf4000000
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+#define DB88F5281_NOR_BOOT_SIZE SZ_512K
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+
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+/*
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+ * 7-Segment on Device bus chip select 0
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+ */
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+
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+#define DB88F5281_7SEG_BASE 0xfa000000
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+#define DB88F5281_7SEG_SIZE SZ_1K
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+
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+/*
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+ * 32M NOR flash on Device bus chip select 1
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+ */
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+
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+#define DB88F5281_NOR_BASE 0xfc000000
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+#define DB88F5281_NOR_SIZE SZ_32M
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+
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+/*
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+ * 32M NAND flash on Device bus chip select 2
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+ */
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+
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+#define DB88F5281_NAND_BASE 0xfa800000
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+#define DB88F5281_NAND_SIZE SZ_1K
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+
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+/*
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+ * PCI
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+ */
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+
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+#define DB88F5281_PCI_SLOT0_OFFS 7
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+#define DB88F5281_PCI_SLOT0_IRQ_PIN 12
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+#define DB88F5281_PCI_SLOT1_SLOT2_IRQ_PIN 13
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+
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+/*****************************************************************************
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+ * 512M NOR Flash on Device bus Boot CS
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+ ****************************************************************************/
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+
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+static struct physmap_flash_data db88f5281_boot_flash_data = {
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+ .width = 1, /* 8 bit bus width */
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+};
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+
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+static struct resource db88f5281_boot_flash_resource = {
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+ .flags = IORESOURCE_MEM,
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+ .start = DB88F5281_NOR_BOOT_BASE,
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+ .end = DB88F5281_NOR_BOOT_BASE + DB88F5281_NOR_BOOT_SIZE - 1,
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+};
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+
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+static struct platform_device db88f5281_boot_flash = {
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+ .name = "physmap-flash",
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+ .id = 0,
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+ .dev = {
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+ .platform_data = &db88f5281_boot_flash_data,
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+ },
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+ .num_resources = 1,
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+ .resource = &db88f5281_boot_flash_resource,
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+};
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+
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+/*****************************************************************************
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+ * 32M NOR Flash on Device bus CS1
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+ ****************************************************************************/
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+
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+static struct physmap_flash_data db88f5281_nor_flash_data = {
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+ .width = 4, /* 32 bit bus width */
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+};
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+
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+static struct resource db88f5281_nor_flash_resource = {
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+ .flags = IORESOURCE_MEM,
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+ .start = DB88F5281_NOR_BASE,
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+ .end = DB88F5281_NOR_BASE + DB88F5281_NOR_SIZE - 1,
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+};
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+
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+static struct platform_device db88f5281_nor_flash = {
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+ .name = "physmap-flash",
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+ .id = 1,
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+ .dev = {
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+ .platform_data = &db88f5281_nor_flash_data,
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+ },
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+ .num_resources = 1,
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+ .resource = &db88f5281_nor_flash_resource,
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+};
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+
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+/*****************************************************************************
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+ * 32M NAND Flash on Device bus CS2
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