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@@ -1187,3 +1187,55 @@
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#define MCF_SDRAMC_SDCFG1_WTLAT(x) (((x)&0x00000007)<<4)
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#define MCF_SDRAMC_SDCFG1_REF2ACT(x) (((x)&0x0000000F)<<8)
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#define MCF_SDRAMC_SDCFG1_PRE2ACT(x) (((x)&0x00000007)<<12)
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+#define MCF_SDRAMC_SDCFG1_ACT2RW(x) (((x)&0x00000007)<<16)
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+#define MCF_SDRAMC_SDCFG1_RDLAT(x) (((x)&0x0000000F)<<20)
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+#define MCF_SDRAMC_SDCFG1_SWT2RD(x) (((x)&0x00000007)<<24)
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+#define MCF_SDRAMC_SDCFG1_SRD2RW(x) (((x)&0x0000000F)<<28)
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+
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+/* Bit definitions and macros for MCF_SDRAMC_SDCFG2 */
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+#define MCF_SDRAMC_SDCFG2_BL(x) (((x)&0x0000000F)<<16)
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+#define MCF_SDRAMC_SDCFG2_BRD2WT(x) (((x)&0x0000000F)<<20)
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+#define MCF_SDRAMC_SDCFG2_BWT2RW(x) (((x)&0x0000000F)<<24)
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+#define MCF_SDRAMC_SDCFG2_BRD2PRE(x) (((x)&0x0000000F)<<28)
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+
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+/* Device Errata - LIMP mode work around */
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+#define MCF_SDRAMC_REFRESH (0x40000000)
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+
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+/* Bit definitions and macros for MCF_SDRAMC_SDDS */
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+#define MCF_SDRAMC_SDDS_SB_D(x) (((x)&0x00000003)<<0)
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+#define MCF_SDRAMC_SDDS_SB_S(x) (((x)&0x00000003)<<2)
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+#define MCF_SDRAMC_SDDS_SB_A(x) (((x)&0x00000003)<<4)
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+#define MCF_SDRAMC_SDDS_SB_C(x) (((x)&0x00000003)<<6)
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+#define MCF_SDRAMC_SDDS_SB_E(x) (((x)&0x00000003)<<8)
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+
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+/* Bit definitions and macros for MCF_SDRAMC_SDCS */
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+#define MCF_SDRAMC_SDCS_CSSZ(x) (((x)&0x0000001F)<<0)
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+#define MCF_SDRAMC_SDCS_BASE(x) (((x)&0x00000FFF)<<20)
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+#define MCF_SDRAMC_SDCS_BA(x) ((x)&0xFFF00000)
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+#define MCF_SDRAMC_SDCS_CSSZ_DIABLE (0x00000000)
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+#define MCF_SDRAMC_SDCS_CSSZ_1MBYTE (0x00000013)
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+#define MCF_SDRAMC_SDCS_CSSZ_2MBYTE (0x00000014)
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+#define MCF_SDRAMC_SDCS_CSSZ_4MBYTE (0x00000015)
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+#define MCF_SDRAMC_SDCS_CSSZ_8MBYTE (0x00000016)
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+#define MCF_SDRAMC_SDCS_CSSZ_16MBYTE (0x00000017)
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+#define MCF_SDRAMC_SDCS_CSSZ_32MBYTE (0x00000018)
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+#define MCF_SDRAMC_SDCS_CSSZ_64MBYTE (0x00000019)
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+#define MCF_SDRAMC_SDCS_CSSZ_128MBYTE (0x0000001A)
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+#define MCF_SDRAMC_SDCS_CSSZ_256MBYTE (0x0000001B)
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+#define MCF_SDRAMC_SDCS_CSSZ_512MBYTE (0x0000001C)
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+#define MCF_SDRAMC_SDCS_CSSZ_1GBYTE (0x0000001D)
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+#define MCF_SDRAMC_SDCS_CSSZ_2GBYTE (0x0000001E)
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+#define MCF_SDRAMC_SDCS_CSSZ_4GBYTE (0x0000001F)
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+
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+/*
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+ * Edge Port Module (EPORT)
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+ */
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+#define MCFEPORT_EPPAR (0xFC094000)
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+#define MCFEPORT_EPDDR (0xFC094002)
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+#define MCFEPORT_EPIER (0xFC094003)
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+#define MCFEPORT_EPDR (0xFC094004)
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+#define MCFEPORT_EPPDR (0xFC094005)
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+#define MCFEPORT_EPFR (0xFC094006)
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+
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+/********************************************************************/
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+#endif /* m532xsim_h */
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吉超博