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+/*
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+ NetWinder Floating Point Emulator
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+ (c) Rebel.COM, 1998,1999
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+ (c) Philip Blundell, 2001
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+
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+ Direct questions, comments to Scott Bambrough <scottb@netwinder.org>
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+
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+ This program is free software; you can redistribute it and/or modify
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+ it under the terms of the GNU General Public License as published by
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+ the Free Software Foundation; either version 2 of the License, or
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+ (at your option) any later version.
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+
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+ This program is distributed in the hope that it will be useful,
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+ but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ GNU General Public License for more details.
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+
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+ You should have received a copy of the GNU General Public License
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+ along with this program; if not, write to the Free Software
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+ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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+*/
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+
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+#ifndef __FPOPCODE_H__
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+#define __FPOPCODE_H__
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+
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+
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+/*
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+ARM Floating Point Instruction Classes
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+| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | |
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+|c o n d|1 1 0 P|U|u|W|L| Rn |v| Fd |0|0|0|1| o f f s e t | CPDT
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+|c o n d|1 1 0 P|U|w|W|L| Rn |x| Fd |0|0|1|0| o f f s e t | CPDT (copro 2)
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+| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | |
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+|c o n d|1 1 1 0|a|b|c|d|e| Fn |j| Fd |0|0|0|1|f|g|h|0|i| Fm | CPDO
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+|c o n d|1 1 1 0|a|b|c|L|e| Fn | Rd |0|0|0|1|f|g|h|1|i| Fm | CPRT
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+|c o n d|1 1 1 0|a|b|c|1|e| Fn |1|1|1|1|0|0|0|1|f|g|h|1|i| Fm | comparisons
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+| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | |
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+
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+CPDT data transfer instructions
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+ LDF, STF, LFM (copro 2), SFM (copro 2)
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+
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+CPDO dyadic arithmetic instructions
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+ ADF, MUF, SUF, RSF, DVF, RDF,
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+ POW, RPW, RMF, FML, FDV, FRD, POL
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+
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+CPDO monadic arithmetic instructions
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+ MVF, MNF, ABS, RND, SQT, LOG, LGN, EXP,
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+ SIN, COS, TAN, ASN, ACS, ATN, URD, NRM
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+
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+CPRT joint arithmetic/data transfer instructions
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+ FIX (arithmetic followed by load/store)
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+ FLT (load/store followed by arithmetic)
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+ CMF, CNF CMFE, CNFE (comparisons)
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+ WFS, RFS (write/read floating point status register)
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+ WFC, RFC (write/read floating point control register)
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+
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+cond condition codes
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+P pre/post index bit: 0 = postindex, 1 = preindex
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+U up/down bit: 0 = stack grows down, 1 = stack grows up
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+W write back bit: 1 = update base register (Rn)
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+L load/store bit: 0 = store, 1 = load
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+Rn base register
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+Rd destination/source register
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+Fd floating point destination register
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+Fn floating point source register
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+Fm floating point source register or floating point constant
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+
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+uv transfer length (TABLE 1)
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+wx register count (TABLE 2)
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+abcd arithmetic opcode (TABLES 3 & 4)
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+ef destination size (rounding precision) (TABLE 5)
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+gh rounding mode (TABLE 6)
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+j dyadic/monadic bit: 0 = dyadic, 1 = monadic
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+i constant bit: 1 = constant (TABLE 6)
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+*/
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+
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+/*
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+TABLE 1
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++-------------------------+---+---+---------+---------+
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+| Precision | u | v | FPSR.EP | length |
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++-------------------------+---+---+---------+---------+
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+| Single | 0 | 0 | x | 1 words |
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+| Double | 1 | 1 | x | 2 words |
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+| Extended | 1 | 1 | x | 3 words |
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+| Packed decimal | 1 | 1 | 0 | 3 words |
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+| Expanded packed decimal | 1 | 1 | 1 | 4 words |
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++-------------------------+---+---+---------+---------+
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+Note: x = don't care
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+*/
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+
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+/*
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+TABLE 2
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++---+---+---------------------------------+
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+| w | x | Number of registers to transfer |
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++---+---+---------------------------------+
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+| 0 | 1 | 1 |
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+| 1 | 0 | 2 |
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+| 1 | 1 | 3 |
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+| 0 | 0 | 4 |
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++---+---+---------------------------------+
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+*/
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+
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+/*
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+TABLE 3: Dyadic Floating Point Opcodes
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++---+---+---+---+----------+-----------------------+-----------------------+
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+| a | b | c | d | Mnemonic | Description | Operation |
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++---+---+---+---+----------+-----------------------+-----------------------+
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+| 0 | 0 | 0 | 0 | ADF | Add | Fd := Fn + Fm |
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+| 0 | 0 | 0 | 1 | MUF | Multiply | Fd := Fn * Fm |
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+| 0 | 0 | 1 | 0 | SUF | Subtract | Fd := Fn - Fm |
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+| 0 | 0 | 1 | 1 | RSF | Reverse subtract | Fd := Fm - Fn |
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+| 0 | 1 | 0 | 0 | DVF | Divide | Fd := Fn / Fm |
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+| 0 | 1 | 0 | 1 | RDF | Reverse divide | Fd := Fm / Fn |
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+| 0 | 1 | 1 | 0 | POW | Power | Fd := Fn ^ Fm |
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+| 0 | 1 | 1 | 1 | RPW | Reverse power | Fd := Fm ^ Fn |
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+| 1 | 0 | 0 | 0 | RMF | Remainder | Fd := IEEE rem(Fn/Fm) |
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+| 1 | 0 | 0 | 1 | FML | Fast Multiply | Fd := Fn * Fm |
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+| 1 | 0 | 1 | 0 | FDV | Fast Divide | Fd := Fn / Fm |
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+| 1 | 0 | 1 | 1 | FRD | Fast reverse divide | Fd := Fm / Fn |
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+| 1 | 1 | 0 | 0 | POL | Polar angle (ArcTan2) | Fd := arctan2(Fn,Fm) |
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+| 1 | 1 | 0 | 1 | | undefined instruction | trap |
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+| 1 | 1 | 1 | 0 | | undefined instruction | trap |
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+| 1 | 1 | 1 | 1 | | undefined instruction | trap |
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++---+---+---+---+----------+-----------------------+-----------------------+
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+Note: POW, RPW, POL are deprecated, and are available for backwards
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+ compatibility only.
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+*/
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+
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+/*
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+TABLE 4: Monadic Floating Point Opcodes
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++---+---+---+---+----------+-----------------------+-----------------------+
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+| a | b | c | d | Mnemonic | Description | Operation |
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++---+---+---+---+----------+-----------------------+-----------------------+
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+| 0 | 0 | 0 | 0 | MVF | Move | Fd := Fm |
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+| 0 | 0 | 0 | 1 | MNF | Move negated | Fd := - Fm |
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+| 0 | 0 | 1 | 0 | ABS | Absolute value | Fd := abs(Fm) |
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+| 0 | 0 | 1 | 1 | RND | Round to integer | Fd := int(Fm) |
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+| 0 | 1 | 0 | 0 | SQT | Square root | Fd := sqrt(Fm) |
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+| 0 | 1 | 0 | 1 | LOG | Log base 10 | Fd := log10(Fm) |
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+| 0 | 1 | 1 | 0 | LGN | Log base e | Fd := ln(Fm) |
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+| 0 | 1 | 1 | 1 | EXP | Exponent | Fd := e ^ Fm |
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+| 1 | 0 | 0 | 0 | SIN | Sine | Fd := sin(Fm) |
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+| 1 | 0 | 0 | 1 | COS | Cosine | Fd := cos(Fm) |
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+| 1 | 0 | 1 | 0 | TAN | Tangent | Fd := tan(Fm) |
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+| 1 | 0 | 1 | 1 | ASN | Arc Sine | Fd := arcsin(Fm) |
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+| 1 | 1 | 0 | 0 | ACS | Arc Cosine | Fd := arccos(Fm) |
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+| 1 | 1 | 0 | 1 | ATN | Arc Tangent | Fd := arctan(Fm) |
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+| 1 | 1 | 1 | 0 | URD | Unnormalized round | Fd := int(Fm) |
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+| 1 | 1 | 1 | 1 | NRM | Normalize | Fd := norm(Fm) |
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++---+---+---+---+----------+-----------------------+-----------------------+
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+Note: LOG, LGN, EXP, SIN, COS, TAN, ASN, ACS, ATN are deprecated, and are
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+ available for backwards compatibility only.
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+*/
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+
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+/*
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+TABLE 5
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++-------------------------+---+---+
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+| Rounding Precision | e | f |
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++-------------------------+---+---+
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+| IEEE Single precision | 0 | 0 |
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+| IEEE Double precision | 0 | 1 |
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+| IEEE Extended precision | 1 | 0 |
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+| undefined (trap) | 1 | 1 |
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++-------------------------+---+---+
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+*/
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+
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+/*
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+TABLE 5
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++---------------------------------+---+---+
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+| Rounding Mode | g | h |
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++---------------------------------+---+---+
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+| Round to nearest (default) | 0 | 0 |
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+| Round toward plus infinity | 0 | 1 |
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+| Round toward negative infinity | 1 | 0 |
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+| Round toward zero | 1 | 1 |
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++---------------------------------+---+---+
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+*/
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+
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+/*
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+===
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+=== Definitions for load and store instructions
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+===
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+*/
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+
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+/* bit masks */
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+#define BIT_PREINDEX 0x01000000
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+#define BIT_UP 0x00800000
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+#define BIT_WRITE_BACK 0x00200000
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+#define BIT_LOAD 0x00100000
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+
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+/* masks for load/store */
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+#define MASK_CPDT 0x0c000000 /* data processing opcode */
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+#define MASK_OFFSET 0x000000ff
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+#define MASK_TRANSFER_LENGTH 0x00408000
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+#define MASK_REGISTER_COUNT MASK_TRANSFER_LENGTH
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+#define MASK_COPROCESSOR 0x00000f00
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+
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+/* Tests for transfer length */
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+#define TRANSFER_SINGLE 0x00000000
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袁开兴