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@@ -231,3 +231,51 @@ do { \
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#define I2S_AICR_MO 0x00001000 /* mono output requested */
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#define I2S_AICR_AMO 0x00002000 /* relation between LRCKO/FS0 and SDO */
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#define I2S_AICR_AMO_SHIFT 13
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+#define I2S_AICR_LRO 0x00004000 /* function of LRCKO pin */
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+#define I2S_AICR_SDMO 0x00070000 /* format of output audio data */
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+#define I2S_AICR_SDMO_SHIFT 16
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+#define I2S_AICR_CLO 0x00080000 /* output FIFO clearing control */
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+#define I2S_AICR_OM 0x00100000 /* output state control */
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+#define I2S_AICR__OUT_MASK 0x001f7000
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+#define I2S_AICR_DIV 0x03000000 /* frequency division rate */
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+#define I2S_AICR_DIV_SHIFT 24
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+#define I2S_AICR_FL 0x20000000 /* frame length */
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+#define I2S_AICR_FS 0x40000000 /* frame sync method */
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+#define I2S_AICR_ME 0x80000000 /* master enable */
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+
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+/*
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+ * PCMCIA
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+ */
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+#define __addr_MB93493_PCMCIA(X) ((volatile unsigned long *)(__region_CS5 + (X)))
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+
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+/*
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+ * GPIO
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+ */
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+#define __get_MB93493_GPIO_PDR(X) __get_MB93493(0x380 + (X) * 0xc0)
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+#define __set_MB93493_GPIO_PDR(X,V) __set_MB93493(0x380 + (X) * 0xc0, (V))
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+
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+#define __get_MB93493_GPIO_GPDR(X) __get_MB93493(0x384 + (X) * 0xc0)
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+#define __set_MB93493_GPIO_GPDR(X,V) __set_MB93493(0x384 + (X) * 0xc0, (V))
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+
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+#define __get_MB93493_GPIO_SIR(X) __get_MB93493(0x388 + (X) * 0xc0)
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+#define __set_MB93493_GPIO_SIR(X,V) __set_MB93493(0x388 + (X) * 0xc0, (V))
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+
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+#define __get_MB93493_GPIO_SOR(X) __get_MB93493(0x38c + (X) * 0xc0)
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+#define __set_MB93493_GPIO_SOR(X,V) __set_MB93493(0x38c + (X) * 0xc0, (V))
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+
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+#define __get_MB93493_GPIO_PDSR(X) __get_MB93493(0x390 + (X) * 0xc0)
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+#define __set_MB93493_GPIO_PDSR(X,V) __set_MB93493(0x390 + (X) * 0xc0, (V))
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+
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+#define __get_MB93493_GPIO_PDCR(X) __get_MB93493(0x394 + (X) * 0xc0)
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+#define __set_MB93493_GPIO_PDCR(X,V) __set_MB93493(0x394 + (X) * 0xc0, (V))
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+
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+#define __get_MB93493_GPIO_INTST(X) __get_MB93493(0x398 + (X) * 0xc0)
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+#define __set_MB93493_GPIO_INTST(X,V) __set_MB93493(0x398 + (X) * 0xc0, (V))
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+
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+#define __get_MB93493_GPIO_IEHL(X) __get_MB93493(0x39c + (X) * 0xc0)
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+#define __set_MB93493_GPIO_IEHL(X,V) __set_MB93493(0x39c + (X) * 0xc0, (V))
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+
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+#define __get_MB93493_GPIO_IELH(X) __get_MB93493(0x3a0 + (X) * 0xc0)
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+#define __set_MB93493_GPIO_IELH(X,V) __set_MB93493(0x3a0 + (X) * 0xc0, (V))
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+
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+#endif /* _ASM_MB93493_REGS_H */
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