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@@ -570,3 +570,78 @@
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/*
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* Port G
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+ */
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+#define PGDIR_ADDR 0xfffff430 /* Port G direction reg */
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+#define PGDATA_ADDR 0xfffff431 /* Port G data register */
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+#define PGPUEN_ADDR 0xfffff432 /* Port G Pull-Up enable reg */
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+#define PGSEL_ADDR 0xfffff433 /* Port G Select Register */
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+
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+#define PGDIR BYTE_REF(PGDIR_ADDR)
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+#define PGDATA BYTE_REF(PGDATA_ADDR)
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+#define PGPUEN BYTE_REF(PGPUEN_ADDR)
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+#define PGSEL BYTE_REF(PGSEL_ADDR)
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+
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+#define PG(x) (1 << (x))
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+
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+#define PG_UART_TXD PG(0) /* Use UART_TXD as PG(0) */
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+#define PG_UART_RXD PG(1) /* Use UART_RXD as PG(1) */
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+#define PG_PWMOUT PG(2) /* Use PWMOUT as PG(2) */
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+#define PG_TOUT2 PG(3) /* Use TOUT2 as PG(3) */
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+#define PG_TIN2 PG(4) /* Use TIN2 as PG(4) */
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+#define PG_TOUT1 PG(5) /* Use TOUT1 as PG(5) */
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+#define PG_TIN1 PG(6) /* Use TIN1 as PG(6) */
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+#define PG_RTCOUT PG(7) /* Use RTCOUT as PG(7) */
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+
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+/*
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+ * Port J
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+ */
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+#define PJDIR_ADDR 0xfffff438 /* Port J direction reg */
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+#define PJDATA_ADDR 0xfffff439 /* Port J data register */
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+#define PJSEL_ADDR 0xfffff43b /* Port J Select Register */
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+
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+#define PJDIR BYTE_REF(PJDIR_ADDR)
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+#define PJDATA BYTE_REF(PJDATA_ADDR)
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+#define PJSEL BYTE_REF(PJSEL_ADDR)
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+
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+#define PJ(x) (1 << (x))
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+
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+#define PJ_CSD3 PJ(7) /* Use CSD3 as PJ(7) */
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+
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+/*
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+ * Port K
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+ */
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+#define PKDIR_ADDR 0xfffff440 /* Port K direction reg */
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+#define PKDATA_ADDR 0xfffff441 /* Port K data register */
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+#define PKPUEN_ADDR 0xfffff442 /* Port K Pull-Up enable reg */
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+#define PKSEL_ADDR 0xfffff443 /* Port K Select Register */
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+
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+#define PKDIR BYTE_REF(PKDIR_ADDR)
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+#define PKDATA BYTE_REF(PKDATA_ADDR)
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+#define PKPUEN BYTE_REF(PKPUEN_ADDR)
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+#define PKSEL BYTE_REF(PKSEL_ADDR)
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+
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+#define PK(x) (1 << (x))
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+
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+/*
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+ * Port M
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+ */
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+#define PMDIR_ADDR 0xfffff438 /* Port M direction reg */
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+#define PMDATA_ADDR 0xfffff439 /* Port M data register */
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+#define PMPUEN_ADDR 0xfffff43a /* Port M Pull-Up enable reg */
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+#define PMSEL_ADDR 0xfffff43b /* Port M Select Register */
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+
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+#define PMDIR BYTE_REF(PMDIR_ADDR)
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+#define PMDATA BYTE_REF(PMDATA_ADDR)
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+#define PMPUEN BYTE_REF(PMPUEN_ADDR)
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+#define PMSEL BYTE_REF(PMSEL_ADDR)
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+
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+#define PM(x) (1 << (x))
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+
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+/**********
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+ *
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+ * 0xFFFFF5xx -- Pulse-Width Modulator (PWM)
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+ *
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+ **********/
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+
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+/*
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+ * PWM Control Register
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