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@@ -1985,3 +1985,97 @@ static struct omap_hwmod omap3xxx_usb_host_hs_hwmod = {
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* Errata: USB host EHCI may stall when entering smart-standby mode
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* Id: i571
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*
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+ * Description:
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+ * When the USBHOST module is set to smart-standby mode, and when it is
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+ * ready to enter the standby state (i.e. all ports are suspended and
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+ * all attached devices are in suspend mode), then it can wrongly assert
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+ * the Mstandby signal too early while there are still some residual OCP
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+ * transactions ongoing. If this condition occurs, the internal state
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+ * machine may go to an undefined state and the USB link may be stuck
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+ * upon the next resume.
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+ *
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+ * Workaround:
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+ * Don't use smart standby; use only force standby,
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+ * hence HWMOD_SWSUP_MSTANDBY
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+ */
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+
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+ /*
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+ * During system boot; If the hwmod framework resets the module
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+ * the module will have smart idle settings; which can lead to deadlock
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+ * (above Errata Id:i660); so, dont reset the module during boot;
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+ * Use HWMOD_INIT_NO_RESET.
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+ */
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+
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+ .flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY |
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+ HWMOD_INIT_NO_RESET,
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+};
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+
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+/*
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+ * 'usb_tll_hs' class
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+ * usb_tll_hs module is the adapter on the usb_host_hs ports
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+ */
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+static struct omap_hwmod_class_sysconfig omap3xxx_usb_tll_hs_sysc = {
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+ .rev_offs = 0x0000,
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+ .sysc_offs = 0x0010,
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+ .syss_offs = 0x0014,
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+ .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE |
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+ SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
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+ SYSC_HAS_AUTOIDLE),
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+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
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+ .sysc_fields = &omap_hwmod_sysc_type1,
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+};
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+
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+static struct omap_hwmod_class omap3xxx_usb_tll_hs_hwmod_class = {
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+ .name = "usb_tll_hs",
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+ .sysc = &omap3xxx_usb_tll_hs_sysc,
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+};
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+
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+static struct omap_hwmod_irq_info omap3xxx_usb_tll_hs_irqs[] = {
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+ { .name = "tll-irq", .irq = 78 + OMAP_INTC_START, },
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+ { .irq = -1 },
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+};
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+
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+static struct omap_hwmod omap3xxx_usb_tll_hs_hwmod = {
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+ .name = "usb_tll_hs",
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+ .class = &omap3xxx_usb_tll_hs_hwmod_class,
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+ .clkdm_name = "l3_init_clkdm",
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+ .mpu_irqs = omap3xxx_usb_tll_hs_irqs,
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+ .main_clk = "usbtll_fck",
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+ .prcm = {
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+ .omap2 = {
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+ .module_offs = CORE_MOD,
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+ .prcm_reg_id = 3,
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+ .module_bit = OMAP3430ES2_EN_USBTLL_SHIFT,
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+ .idlest_reg_id = 3,
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+ .idlest_idle_bit = OMAP3430ES2_ST_USBTLL_SHIFT,
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+ },
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+ },
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+};
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+
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+static struct omap_hwmod omap3xxx_hdq1w_hwmod = {
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+ .name = "hdq1w",
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+ .mpu_irqs = omap2_hdq1w_mpu_irqs,
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+ .main_clk = "hdq_fck",
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+ .prcm = {
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+ .omap2 = {
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+ .module_offs = CORE_MOD,
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+ .prcm_reg_id = 1,
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+ .module_bit = OMAP3430_EN_HDQ_SHIFT,
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+ .idlest_reg_id = 1,
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+ .idlest_idle_bit = OMAP3430_ST_HDQ_SHIFT,
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+ },
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+ },
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+ .class = &omap2_hdq1w_class,
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+};
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+
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+/* SAD2D */
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+static struct omap_hwmod_rst_info omap3xxx_sad2d_resets[] = {
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+ { .name = "rst_modem_pwron_sw", .rst_shift = 0 },
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+ { .name = "rst_modem_sw", .rst_shift = 1 },
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+};
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+
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+static struct omap_hwmod_class omap3xxx_sad2d_class = {
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+ .name = "sad2d",
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+};
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+
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+static struct omap_hwmod omap3xxx_sad2d_hwmod = {
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