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@@ -481,3 +481,53 @@ static int omap_pm_read_proc(
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if (virtual_start == 0) {
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g_read_completed = 0;
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+
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+ my_buffer_offset += sprintf(my_base + my_buffer_offset,
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+ "ARM_CKCTL_REG: 0x%-8x \n"
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+ "ARM_IDLECT1_REG: 0x%-8x \n"
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+ "ARM_IDLECT2_REG: 0x%-8x \n"
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+ "ARM_IDLECT3_REG: 0x%-8x \n"
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+ "ARM_EWUPCT_REG: 0x%-8x \n"
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+ "ARM_RSTCT1_REG: 0x%-8x \n"
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+ "ARM_RSTCT2_REG: 0x%-8x \n"
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+ "ARM_SYSST_REG: 0x%-8x \n"
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+ "ULPD_IT_STATUS_REG: 0x%-4x \n"
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+ "ULPD_CLOCK_CTRL_REG: 0x%-4x \n"
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+ "ULPD_SOFT_REQ_REG: 0x%-4x \n"
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+ "ULPD_DPLL_CTRL_REG: 0x%-4x \n"
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+ "ULPD_STATUS_REQ_REG: 0x%-4x \n"
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+ "ULPD_POWER_CTRL_REG: 0x%-4x \n",
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+ ARM_SHOW(ARM_CKCTL),
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+ ARM_SHOW(ARM_IDLECT1),
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+ ARM_SHOW(ARM_IDLECT2),
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+ ARM_SHOW(ARM_IDLECT3),
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+ ARM_SHOW(ARM_EWUPCT),
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+ ARM_SHOW(ARM_RSTCT1),
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+ ARM_SHOW(ARM_RSTCT2),
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+ ARM_SHOW(ARM_SYSST),
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+ ULPD_SHOW(ULPD_IT_STATUS),
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+ ULPD_SHOW(ULPD_CLOCK_CTRL),
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+ ULPD_SHOW(ULPD_SOFT_REQ),
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+ ULPD_SHOW(ULPD_DPLL_CTRL),
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+ ULPD_SHOW(ULPD_STATUS_REQ),
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+ ULPD_SHOW(ULPD_POWER_CTRL));
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+
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+ if (cpu_is_omap7xx()) {
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+ my_buffer_offset += sprintf(my_base + my_buffer_offset,
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+ "MPUI7XX_CTRL_REG 0x%-8x \n"
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+ "MPUI7XX_DSP_STATUS_REG: 0x%-8x \n"
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+ "MPUI7XX_DSP_BOOT_CONFIG_REG: 0x%-8x \n"
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+ "MPUI7XX_DSP_API_CONFIG_REG: 0x%-8x \n"
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+ "MPUI7XX_SDRAM_CONFIG_REG: 0x%-8x \n"
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+ "MPUI7XX_EMIFS_CONFIG_REG: 0x%-8x \n",
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+ MPUI7XX_SHOW(MPUI_CTRL),
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+ MPUI7XX_SHOW(MPUI_DSP_STATUS),
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+ MPUI7XX_SHOW(MPUI_DSP_BOOT_CONFIG),
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+ MPUI7XX_SHOW(MPUI_DSP_API_CONFIG),
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+ MPUI7XX_SHOW(EMIFF_SDRAM_CONFIG),
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+ MPUI7XX_SHOW(EMIFS_CONFIG));
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+ } else if (cpu_is_omap15xx()) {
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+ my_buffer_offset += sprintf(my_base + my_buffer_offset,
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+ "MPUI1510_CTRL_REG 0x%-8x \n"
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+ "MPUI1510_DSP_STATUS_REG: 0x%-8x \n"
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+ "MPUI1510_DSP_BOOT_CONFIG_REG: 0x%-8x \n"
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王祥