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@@ -1501,3 +1501,73 @@ static struct omap_hwmod_class omap3xxx_mailbox_hwmod_class = {
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.sysc = &omap3xxx_mailbox_sysc,
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};
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+static struct omap_hwmod_irq_info omap3xxx_mailbox_irqs[] = {
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+ { .irq = 26 + OMAP_INTC_START, },
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+ { .irq = -1 },
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+};
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+
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+static struct omap_hwmod omap3xxx_mailbox_hwmod = {
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+ .name = "mailbox",
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+ .class = &omap3xxx_mailbox_hwmod_class,
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+ .mpu_irqs = omap3xxx_mailbox_irqs,
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+ .main_clk = "mailboxes_ick",
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+ .prcm = {
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+ .omap2 = {
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+ .prcm_reg_id = 1,
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+ .module_bit = OMAP3430_EN_MAILBOXES_SHIFT,
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+ .module_offs = CORE_MOD,
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+ .idlest_reg_id = 1,
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+ .idlest_idle_bit = OMAP3430_ST_MAILBOXES_SHIFT,
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+ },
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+ },
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+};
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+
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+/*
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+ * 'mcspi' class
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+ * multichannel serial port interface (mcspi) / master/slave synchronous serial
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+ * bus
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+ */
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+
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+static struct omap_hwmod_class_sysconfig omap34xx_mcspi_sysc = {
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+ .rev_offs = 0x0000,
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+ .sysc_offs = 0x0010,
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+ .syss_offs = 0x0014,
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+ .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE |
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+ SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
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+ SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
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+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
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+ .sysc_fields = &omap_hwmod_sysc_type1,
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+};
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+
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+static struct omap_hwmod_class omap34xx_mcspi_class = {
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+ .name = "mcspi",
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+ .sysc = &omap34xx_mcspi_sysc,
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+ .rev = OMAP3_MCSPI_REV,
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+};
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+
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+/* mcspi1 */
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+static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = {
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+ .num_chipselect = 4,
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+};
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+
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+static struct omap_hwmod omap34xx_mcspi1 = {
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+ .name = "mcspi1",
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+ .mpu_irqs = omap2_mcspi1_mpu_irqs,
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+ .sdma_reqs = omap2_mcspi1_sdma_reqs,
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+ .main_clk = "mcspi1_fck",
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+ .prcm = {
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+ .omap2 = {
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+ .module_offs = CORE_MOD,
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+ .prcm_reg_id = 1,
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+ .module_bit = OMAP3430_EN_MCSPI1_SHIFT,
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+ .idlest_reg_id = 1,
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+ .idlest_idle_bit = OMAP3430_ST_MCSPI1_SHIFT,
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+ },
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+ },
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+ .class = &omap34xx_mcspi_class,
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+ .dev_attr = &omap_mcspi1_dev_attr,
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+};
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+
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+/* mcspi2 */
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+static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = {
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+ .num_chipselect = 2,
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