|
@@ -155,3 +155,94 @@ static struct omap_hwmod omap2420_dma_system_hwmod = {
|
|
|
.name = "dma",
|
|
|
.class = &omap2xxx_dma_hwmod_class,
|
|
|
.mpu_irqs = omap2_dma_system_irqs,
|
|
|
+ .main_clk = "core_l3_ck",
|
|
|
+ .dev_attr = &dma_dev_attr,
|
|
|
+ .flags = HWMOD_NO_IDLEST,
|
|
|
+};
|
|
|
+
|
|
|
+/* mailbox */
|
|
|
+static struct omap_hwmod_irq_info omap2420_mailbox_irqs[] = {
|
|
|
+ { .name = "dsp", .irq = 26 + OMAP_INTC_START, },
|
|
|
+ { .name = "iva", .irq = 34 + OMAP_INTC_START, },
|
|
|
+ { .irq = -1 },
|
|
|
+};
|
|
|
+
|
|
|
+static struct omap_hwmod omap2420_mailbox_hwmod = {
|
|
|
+ .name = "mailbox",
|
|
|
+ .class = &omap2xxx_mailbox_hwmod_class,
|
|
|
+ .mpu_irqs = omap2420_mailbox_irqs,
|
|
|
+ .main_clk = "mailboxes_ick",
|
|
|
+ .prcm = {
|
|
|
+ .omap2 = {
|
|
|
+ .prcm_reg_id = 1,
|
|
|
+ .module_bit = OMAP24XX_EN_MAILBOXES_SHIFT,
|
|
|
+ .module_offs = CORE_MOD,
|
|
|
+ .idlest_reg_id = 1,
|
|
|
+ .idlest_idle_bit = OMAP24XX_ST_MAILBOXES_SHIFT,
|
|
|
+ },
|
|
|
+ },
|
|
|
+};
|
|
|
+
|
|
|
+/*
|
|
|
+ * 'mcbsp' class
|
|
|
+ * multi channel buffered serial port controller
|
|
|
+ */
|
|
|
+
|
|
|
+static struct omap_hwmod_class omap2420_mcbsp_hwmod_class = {
|
|
|
+ .name = "mcbsp",
|
|
|
+};
|
|
|
+
|
|
|
+static struct omap_hwmod_opt_clk mcbsp_opt_clks[] = {
|
|
|
+ { .role = "pad_fck", .clk = "mcbsp_clks" },
|
|
|
+ { .role = "prcm_fck", .clk = "func_96m_ck" },
|
|
|
+};
|
|
|
+
|
|
|
+/* mcbsp1 */
|
|
|
+static struct omap_hwmod_irq_info omap2420_mcbsp1_irqs[] = {
|
|
|
+ { .name = "tx", .irq = 59 + OMAP_INTC_START, },
|
|
|
+ { .name = "rx", .irq = 60 + OMAP_INTC_START, },
|
|
|
+ { .irq = -1 },
|
|
|
+};
|
|
|
+
|
|
|
+static struct omap_hwmod omap2420_mcbsp1_hwmod = {
|
|
|
+ .name = "mcbsp1",
|
|
|
+ .class = &omap2420_mcbsp_hwmod_class,
|
|
|
+ .mpu_irqs = omap2420_mcbsp1_irqs,
|
|
|
+ .sdma_reqs = omap2_mcbsp1_sdma_reqs,
|
|
|
+ .main_clk = "mcbsp1_fck",
|
|
|
+ .prcm = {
|
|
|
+ .omap2 = {
|
|
|
+ .prcm_reg_id = 1,
|
|
|
+ .module_bit = OMAP24XX_EN_MCBSP1_SHIFT,
|
|
|
+ .module_offs = CORE_MOD,
|
|
|
+ .idlest_reg_id = 1,
|
|
|
+ .idlest_idle_bit = OMAP24XX_ST_MCBSP1_SHIFT,
|
|
|
+ },
|
|
|
+ },
|
|
|
+ .opt_clks = mcbsp_opt_clks,
|
|
|
+ .opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks),
|
|
|
+};
|
|
|
+
|
|
|
+/* mcbsp2 */
|
|
|
+static struct omap_hwmod_irq_info omap2420_mcbsp2_irqs[] = {
|
|
|
+ { .name = "tx", .irq = 62 + OMAP_INTC_START, },
|
|
|
+ { .name = "rx", .irq = 63 + OMAP_INTC_START, },
|
|
|
+ { .irq = -1 },
|
|
|
+};
|
|
|
+
|
|
|
+static struct omap_hwmod omap2420_mcbsp2_hwmod = {
|
|
|
+ .name = "mcbsp2",
|
|
|
+ .class = &omap2420_mcbsp_hwmod_class,
|
|
|
+ .mpu_irqs = omap2420_mcbsp2_irqs,
|
|
|
+ .sdma_reqs = omap2_mcbsp2_sdma_reqs,
|
|
|
+ .main_clk = "mcbsp2_fck",
|
|
|
+ .prcm = {
|
|
|
+ .omap2 = {
|
|
|
+ .prcm_reg_id = 1,
|
|
|
+ .module_bit = OMAP24XX_EN_MCBSP2_SHIFT,
|
|
|
+ .module_offs = CORE_MOD,
|
|
|
+ .idlest_reg_id = 1,
|
|
|
+ .idlest_idle_bit = OMAP24XX_ST_MCBSP2_SHIFT,
|
|
|
+ },
|
|
|
+ },
|
|
|
+ .opt_clks = mcbsp_opt_clks,
|