|
@@ -280,3 +280,195 @@ static struct platform_device gio2_device = {
|
|
|
|
|
|
static struct gpio_em_config gio3_config = {
|
|
static struct gpio_em_config gio3_config = {
|
|
.gpio_base = 96,
|
|
.gpio_base = 96,
|
|
|
|
+ .irq_base = EMEV2_GPIO_IRQ(96),
|
|
|
|
+ .number_of_pins = 32,
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+static struct resource gio3_resources[] = {
|
|
|
|
+ [0] = {
|
|
|
|
+ .name = "GIO_096",
|
|
|
|
+ .start = 0xe0050100,
|
|
|
|
+ .end = 0xe005012b,
|
|
|
|
+ .flags = IORESOURCE_MEM,
|
|
|
|
+ },
|
|
|
|
+ [1] = {
|
|
|
|
+ .name = "GIO_096",
|
|
|
|
+ .start = 0xe0050140,
|
|
|
|
+ .end = 0xe005015f,
|
|
|
|
+ .flags = IORESOURCE_MEM,
|
|
|
|
+ },
|
|
|
|
+ [2] = {
|
|
|
|
+ .start = 105,
|
|
|
|
+ .flags = IORESOURCE_IRQ,
|
|
|
|
+ },
|
|
|
|
+ [3] = {
|
|
|
|
+ .start = 106,
|
|
|
|
+ .flags = IORESOURCE_IRQ,
|
|
|
|
+ },
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+static struct platform_device gio3_device = {
|
|
|
|
+ .name = "em_gio",
|
|
|
|
+ .id = 3,
|
|
|
|
+ .resource = gio3_resources,
|
|
|
|
+ .num_resources = ARRAY_SIZE(gio3_resources),
|
|
|
|
+ .dev = {
|
|
|
|
+ .platform_data = &gio3_config,
|
|
|
|
+ },
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+static struct gpio_em_config gio4_config = {
|
|
|
|
+ .gpio_base = 128,
|
|
|
|
+ .irq_base = EMEV2_GPIO_IRQ(128),
|
|
|
|
+ .number_of_pins = 31,
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+static struct resource gio4_resources[] = {
|
|
|
|
+ [0] = {
|
|
|
|
+ .name = "GIO_128",
|
|
|
|
+ .start = 0xe0050200,
|
|
|
|
+ .end = 0xe005022b,
|
|
|
|
+ .flags = IORESOURCE_MEM,
|
|
|
|
+ },
|
|
|
|
+ [1] = {
|
|
|
|
+ .name = "GIO_128",
|
|
|
|
+ .start = 0xe0050240,
|
|
|
|
+ .end = 0xe005025f,
|
|
|
|
+ .flags = IORESOURCE_MEM,
|
|
|
|
+ },
|
|
|
|
+ [2] = {
|
|
|
|
+ .start = 107,
|
|
|
|
+ .flags = IORESOURCE_IRQ,
|
|
|
|
+ },
|
|
|
|
+ [3] = {
|
|
|
|
+ .start = 108,
|
|
|
|
+ .flags = IORESOURCE_IRQ,
|
|
|
|
+ },
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+static struct platform_device gio4_device = {
|
|
|
|
+ .name = "em_gio",
|
|
|
|
+ .id = 4,
|
|
|
|
+ .resource = gio4_resources,
|
|
|
|
+ .num_resources = ARRAY_SIZE(gio4_resources),
|
|
|
|
+ .dev = {
|
|
|
|
+ .platform_data = &gio4_config,
|
|
|
|
+ },
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+static struct resource pmu_resources[] = {
|
|
|
|
+ [0] = {
|
|
|
|
+ .start = 152,
|
|
|
|
+ .end = 152,
|
|
|
|
+ .flags = IORESOURCE_IRQ,
|
|
|
|
+ },
|
|
|
|
+ [1] = {
|
|
|
|
+ .start = 153,
|
|
|
|
+ .end = 153,
|
|
|
|
+ .flags = IORESOURCE_IRQ,
|
|
|
|
+ },
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+static struct platform_device pmu_device = {
|
|
|
|
+ .name = "arm-pmu",
|
|
|
|
+ .id = -1,
|
|
|
|
+ .num_resources = ARRAY_SIZE(pmu_resources),
|
|
|
|
+ .resource = pmu_resources,
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+static struct platform_device *emev2_early_devices[] __initdata = {
|
|
|
|
+ &uart0_device,
|
|
|
|
+ &uart1_device,
|
|
|
|
+ &uart2_device,
|
|
|
|
+ &uart3_device,
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+static struct platform_device *emev2_late_devices[] __initdata = {
|
|
|
|
+ &sti_device,
|
|
|
|
+ &gio0_device,
|
|
|
|
+ &gio1_device,
|
|
|
|
+ &gio2_device,
|
|
|
|
+ &gio3_device,
|
|
|
|
+ &gio4_device,
|
|
|
|
+ &pmu_device,
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+void __init emev2_add_standard_devices(void)
|
|
|
|
+{
|
|
|
|
+ emev2_clock_init();
|
|
|
|
+
|
|
|
|
+ platform_add_devices(emev2_early_devices,
|
|
|
|
+ ARRAY_SIZE(emev2_early_devices));
|
|
|
|
+
|
|
|
|
+ platform_add_devices(emev2_late_devices,
|
|
|
|
+ ARRAY_SIZE(emev2_late_devices));
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+void __init emev2_init_delay(void)
|
|
|
|
+{
|
|
|
|
+ shmobile_setup_delay(533, 1, 3); /* Cortex-A9 @ 533MHz */
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+void __init emev2_add_early_devices(void)
|
|
|
|
+{
|
|
|
|
+ emev2_init_delay();
|
|
|
|
+
|
|
|
|
+ early_platform_add_devices(emev2_early_devices,
|
|
|
|
+ ARRAY_SIZE(emev2_early_devices));
|
|
|
|
+
|
|
|
|
+ /* setup early console here as well */
|
|
|
|
+ shmobile_setup_console();
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+void __init emev2_init_irq(void)
|
|
|
|
+{
|
|
|
|
+ void __iomem *gic_dist_base;
|
|
|
|
+ void __iomem *gic_cpu_base;
|
|
|
|
+
|
|
|
|
+ /* Static mappings, never released */
|
|
|
|
+ gic_dist_base = ioremap(0xe0028000, PAGE_SIZE);
|
|
|
|
+ gic_cpu_base = ioremap(0xe0020000, PAGE_SIZE);
|
|
|
|
+ BUG_ON(!gic_dist_base || !gic_cpu_base);
|
|
|
|
+
|
|
|
|
+ /* Use GIC to handle interrupts */
|
|
|
|
+ gic_init(0, 29, gic_dist_base, gic_cpu_base);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+#ifdef CONFIG_USE_OF
|
|
|
|
+static const struct of_dev_auxdata emev2_auxdata_lookup[] __initconst = {
|
|
|
|
+ { }
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+void __init emev2_add_standard_devices_dt(void)
|
|
|
|
+{
|
|
|
|
+ of_platform_populate(NULL, of_default_bus_match_table,
|
|
|
|
+ emev2_auxdata_lookup, NULL);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static const struct of_device_id emev2_dt_irq_match[] = {
|
|
|
|
+ { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
|
|
|
|
+ {},
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+static const char *emev2_boards_compat_dt[] __initdata = {
|
|
|
|
+ "renesas,emev2",
|
|
|
|
+ NULL,
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+void __init emev2_init_irq_dt(void)
|
|
|
|
+{
|
|
|
|
+ of_irq_init(emev2_dt_irq_match);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+DT_MACHINE_START(EMEV2_DT, "Generic Emma Mobile EV2 (Flattened Device Tree)")
|
|
|
|
+ .smp = smp_ops(emev2_smp_ops),
|
|
|
|
+ .init_early = emev2_init_delay,
|
|
|
|
+ .nr_irqs = NR_IRQS_LEGACY,
|
|
|
|
+ .init_irq = emev2_init_irq_dt,
|
|
|
|
+ .handle_irq = gic_handle_irq,
|
|
|
|
+ .init_machine = emev2_add_standard_devices_dt,
|
|
|
|
+ .timer = &shmobile_timer,
|
|
|
|
+ .dt_compat = emev2_boards_compat_dt,
|
|
|
|
+MACHINE_END
|
|
|
|
+
|
|
|
|
+#endif /* CONFIG_USE_OF */
|