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@@ -290,3 +290,96 @@ struct omap_hwmod_ocp_if {
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#define SYSC_HAS_EMUFREE (1 << 3)
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#define SYSC_HAS_EMUFREE (1 << 3)
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#define SYSC_HAS_CLOCKACTIVITY (1 << 4)
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#define SYSC_HAS_CLOCKACTIVITY (1 << 4)
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#define SYSC_HAS_SIDLEMODE (1 << 5)
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#define SYSC_HAS_SIDLEMODE (1 << 5)
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+#define SYSC_HAS_MIDLEMODE (1 << 6)
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+#define SYSS_HAS_RESET_STATUS (1 << 7)
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+#define SYSC_NO_CACHE (1 << 8) /* XXX SW flag, belongs elsewhere */
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+#define SYSC_HAS_RESET_STATUS (1 << 9)
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+#define SYSC_HAS_DMADISABLE (1 << 10)
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+
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+/* omap_hwmod_sysconfig.clockact flags */
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+#define CLOCKACT_TEST_BOTH 0x0
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+#define CLOCKACT_TEST_MAIN 0x1
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+#define CLOCKACT_TEST_ICLK 0x2
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+#define CLOCKACT_TEST_NONE 0x3
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+
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+/**
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+ * struct omap_hwmod_sysc_fields - hwmod OCP_SYSCONFIG register field offsets.
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+ * @midle_shift: Offset of the midle bit
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+ * @clkact_shift: Offset of the clockactivity bit
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+ * @sidle_shift: Offset of the sidle bit
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+ * @enwkup_shift: Offset of the enawakeup bit
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+ * @srst_shift: Offset of the softreset bit
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+ * @autoidle_shift: Offset of the autoidle bit
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+ * @dmadisable_shift: Offset of the dmadisable bit
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+ */
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+struct omap_hwmod_sysc_fields {
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+ u8 midle_shift;
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+ u8 clkact_shift;
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+ u8 sidle_shift;
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+ u8 enwkup_shift;
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+ u8 srst_shift;
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+ u8 autoidle_shift;
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+ u8 dmadisable_shift;
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+};
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+
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+/**
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+ * struct omap_hwmod_class_sysconfig - hwmod class OCP_SYS* data
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+ * @rev_offs: IP block revision register offset (from module base addr)
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+ * @sysc_offs: OCP_SYSCONFIG register offset (from module base addr)
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+ * @syss_offs: OCP_SYSSTATUS register offset (from module base addr)
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+ * @srst_udelay: Delay needed after doing a softreset in usecs
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+ * @idlemodes: One or more of {SIDLE,MSTANDBY}_{OFF,FORCE,SMART}
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+ * @sysc_flags: SYS{C,S}_HAS* flags indicating SYSCONFIG bits supported
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+ * @clockact: the default value of the module CLOCKACTIVITY bits
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+ *
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+ * @clockact describes to the module which clocks are likely to be
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+ * disabled when the PRCM issues its idle request to the module. Some
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+ * modules have separate clockdomains for the interface clock and main
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+ * functional clock, and can check whether they should acknowledge the
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+ * idle request based on the internal module functionality that has
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+ * been associated with the clocks marked in @clockact. This field is
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+ * only used if HWMOD_SET_DEFAULT_CLOCKACT is set (see below)
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+ *
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+ * @sysc_fields: structure containing the offset positions of various bits in
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+ * SYSCONFIG register. This can be populated using omap_hwmod_sysc_type1 or
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+ * omap_hwmod_sysc_type2 defined in omap_hwmod_common_data.c depending on
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+ * whether the device ip is compliant with the original PRCM protocol
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+ * defined for OMAP2420 or the new PRCM protocol for new OMAP4 IPs.
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+ * If the device follows a different scheme for the sysconfig register ,
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+ * then this field has to be populated with the correct offset structure.
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+ */
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+struct omap_hwmod_class_sysconfig {
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+ u32 rev_offs;
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+ u32 sysc_offs;
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+ u32 syss_offs;
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+ u16 sysc_flags;
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+ struct omap_hwmod_sysc_fields *sysc_fields;
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+ u8 srst_udelay;
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+ u8 idlemodes;
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+ u8 clockact;
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+};
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+
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+/**
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+ * struct omap_hwmod_omap2_prcm - OMAP2/3-specific PRCM data
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+ * @module_offs: PRCM submodule offset from the start of the PRM/CM
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+ * @prcm_reg_id: PRCM register ID (e.g., 3 for CM_AUTOIDLE3)
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+ * @module_bit: register bit shift for AUTOIDLE, WKST, WKEN, GRPSEL regs
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+ * @idlest_reg_id: IDLEST register ID (e.g., 3 for CM_IDLEST3)
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+ * @idlest_idle_bit: register bit shift for CM_IDLEST slave idle bit
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+ * @idlest_stdby_bit: register bit shift for CM_IDLEST master standby bit
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+ *
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+ * @prcm_reg_id and @module_bit are specific to the AUTOIDLE, WKST,
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+ * WKEN, GRPSEL registers. In an ideal world, no extra information
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+ * would be needed for IDLEST information, but alas, there are some
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+ * exceptions, so @idlest_reg_id, @idlest_idle_bit, @idlest_stdby_bit
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+ * are needed for the IDLEST registers (c.f. 2430 I2CHS, 3430 USBHOST)
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+ */
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+struct omap_hwmod_omap2_prcm {
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+ s16 module_offs;
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+ u8 prcm_reg_id;
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+ u8 module_bit;
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+ u8 idlest_reg_id;
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+ u8 idlest_idle_bit;
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+ u8 idlest_stdby_bit;
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+};
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+
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