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				@@ -58,3 +58,75 @@ static void __iomem *_cm_bases[OMAP4_MAX_PRCM_PARTITIONS]; 
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				  * omap_cm_base_init - Populates the cm partitions 
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				  * 
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				  * Populates the base addresses of the _cm_bases 
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				+ * array used for read/write of cm module registers. 
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				+ */ 
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				+void omap_cm_base_init(void) 
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				+{ 
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				+	_cm_bases[OMAP4430_PRM_PARTITION] = prm_base; 
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				+	_cm_bases[OMAP4430_CM1_PARTITION] = cm_base; 
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				+	_cm_bases[OMAP4430_CM2_PARTITION] = cm2_base; 
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				+	_cm_bases[OMAP4430_PRCM_MPU_PARTITION] = prcm_mpu_base; 
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				+} 
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				+ 
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				+/* Private functions */ 
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				+ 
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				+/** 
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				+ * _clkctrl_idlest - read a CM_*_CLKCTRL register; mask & shift IDLEST bitfield 
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				+ * @part: PRCM partition ID that the CM_CLKCTRL register exists in 
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				+ * @inst: CM instance register offset (*_INST macro) 
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				+ * @cdoffs: Clockdomain register offset (*_CDOFFS macro) 
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				+ * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro) 
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				+ * 
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				+ * Return the IDLEST bitfield of a CM_*_CLKCTRL register, shifted down to 
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				+ * bit 0. 
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				+ */ 
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				+static u32 _clkctrl_idlest(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs) 
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				+{ 
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				+	u32 v = omap4_cminst_read_inst_reg(part, inst, clkctrl_offs); 
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				+	v &= OMAP4430_IDLEST_MASK; 
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				+	v >>= OMAP4430_IDLEST_SHIFT; 
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				+	return v; 
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				+} 
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				+ 
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				+/** 
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				+ * _is_module_ready - can module registers be accessed without causing an abort? 
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				+ * @part: PRCM partition ID that the CM_CLKCTRL register exists in 
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				+ * @inst: CM instance register offset (*_INST macro) 
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				+ * @cdoffs: Clockdomain register offset (*_CDOFFS macro) 
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				+ * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro) 
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				+ * 
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				+ * Returns true if the module's CM_*_CLKCTRL.IDLEST bitfield is either 
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				+ * *FUNCTIONAL or *INTERFACE_IDLE; false otherwise. 
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				+ */ 
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				+static bool _is_module_ready(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs) 
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				+{ 
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				+	u32 v; 
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				+ 
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				+	v = _clkctrl_idlest(part, inst, cdoffs, clkctrl_offs); 
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				+ 
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				+	return (v == CLKCTRL_IDLEST_FUNCTIONAL || 
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				+		v == CLKCTRL_IDLEST_INTERFACE_IDLE) ? true : false; 
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				+} 
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				+ 
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				+/* Public functions */ 
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				+ 
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				+/* Read a register in a CM instance */ 
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				+u32 omap4_cminst_read_inst_reg(u8 part, s16 inst, u16 idx) 
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				+{ 
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				+	BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS || 
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				+	       part == OMAP4430_INVALID_PRCM_PARTITION || 
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				+	       !_cm_bases[part]); 
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				+	return __raw_readl(_cm_bases[part] + inst + idx); 
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				+} 
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				+ 
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				+/* Write into a register in a CM instance */ 
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				+void omap4_cminst_write_inst_reg(u32 val, u8 part, s16 inst, u16 idx) 
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				+{ 
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				+	BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS || 
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				+	       part == OMAP4430_INVALID_PRCM_PARTITION || 
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				+	       !_cm_bases[part]); 
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				+	__raw_writel(val, _cm_bases[part] + inst + idx); 
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				+} 
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				+ 
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				+/* Read-modify-write a register in CM1. Caller must lock */ 
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				+u32 omap4_cminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part, s16 inst, 
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