|
@@ -0,0 +1,86 @@
|
|
|
+/*
|
|
|
+ * GPMC support functions
|
|
|
+ *
|
|
|
+ * Copyright (C) 2005-2006 Nokia Corporation
|
|
|
+ *
|
|
|
+ * Author: Juha Yrjola
|
|
|
+ *
|
|
|
+ * Copyright (C) 2009 Texas Instruments
|
|
|
+ * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
|
|
|
+ *
|
|
|
+ * This program is free software; you can redistribute it and/or modify
|
|
|
+ * it under the terms of the GNU General Public License version 2 as
|
|
|
+ * published by the Free Software Foundation.
|
|
|
+ */
|
|
|
+#undef DEBUG
|
|
|
+
|
|
|
+#include <linux/irq.h>
|
|
|
+#include <linux/kernel.h>
|
|
|
+#include <linux/init.h>
|
|
|
+#include <linux/err.h>
|
|
|
+#include <linux/clk.h>
|
|
|
+#include <linux/ioport.h>
|
|
|
+#include <linux/spinlock.h>
|
|
|
+#include <linux/io.h>
|
|
|
+#include <linux/module.h>
|
|
|
+#include <linux/interrupt.h>
|
|
|
+#include <linux/platform_device.h>
|
|
|
+
|
|
|
+#include <linux/platform_data/mtd-nand-omap2.h>
|
|
|
+
|
|
|
+#include <asm/mach-types.h>
|
|
|
+
|
|
|
+#include "soc.h"
|
|
|
+#include "common.h"
|
|
|
+#include "omap_device.h"
|
|
|
+#include "gpmc.h"
|
|
|
+
|
|
|
+#define DEVICE_NAME "omap-gpmc"
|
|
|
+
|
|
|
+/* GPMC register offsets */
|
|
|
+#define GPMC_REVISION 0x00
|
|
|
+#define GPMC_SYSCONFIG 0x10
|
|
|
+#define GPMC_SYSSTATUS 0x14
|
|
|
+#define GPMC_IRQSTATUS 0x18
|
|
|
+#define GPMC_IRQENABLE 0x1c
|
|
|
+#define GPMC_TIMEOUT_CONTROL 0x40
|
|
|
+#define GPMC_ERR_ADDRESS 0x44
|
|
|
+#define GPMC_ERR_TYPE 0x48
|
|
|
+#define GPMC_CONFIG 0x50
|
|
|
+#define GPMC_STATUS 0x54
|
|
|
+#define GPMC_PREFETCH_CONFIG1 0x1e0
|
|
|
+#define GPMC_PREFETCH_CONFIG2 0x1e4
|
|
|
+#define GPMC_PREFETCH_CONTROL 0x1ec
|
|
|
+#define GPMC_PREFETCH_STATUS 0x1f0
|
|
|
+#define GPMC_ECC_CONFIG 0x1f4
|
|
|
+#define GPMC_ECC_CONTROL 0x1f8
|
|
|
+#define GPMC_ECC_SIZE_CONFIG 0x1fc
|
|
|
+#define GPMC_ECC1_RESULT 0x200
|
|
|
+#define GPMC_ECC_BCH_RESULT_0 0x240 /* not available on OMAP2 */
|
|
|
+#define GPMC_ECC_BCH_RESULT_1 0x244 /* not available on OMAP2 */
|
|
|
+#define GPMC_ECC_BCH_RESULT_2 0x248 /* not available on OMAP2 */
|
|
|
+#define GPMC_ECC_BCH_RESULT_3 0x24c /* not available on OMAP2 */
|
|
|
+
|
|
|
+/* GPMC ECC control settings */
|
|
|
+#define GPMC_ECC_CTRL_ECCCLEAR 0x100
|
|
|
+#define GPMC_ECC_CTRL_ECCDISABLE 0x000
|
|
|
+#define GPMC_ECC_CTRL_ECCREG1 0x001
|
|
|
+#define GPMC_ECC_CTRL_ECCREG2 0x002
|
|
|
+#define GPMC_ECC_CTRL_ECCREG3 0x003
|
|
|
+#define GPMC_ECC_CTRL_ECCREG4 0x004
|
|
|
+#define GPMC_ECC_CTRL_ECCREG5 0x005
|
|
|
+#define GPMC_ECC_CTRL_ECCREG6 0x006
|
|
|
+#define GPMC_ECC_CTRL_ECCREG7 0x007
|
|
|
+#define GPMC_ECC_CTRL_ECCREG8 0x008
|
|
|
+#define GPMC_ECC_CTRL_ECCREG9 0x009
|
|
|
+
|
|
|
+#define GPMC_CONFIG2_CSEXTRADELAY BIT(7)
|
|
|
+#define GPMC_CONFIG3_ADVEXTRADELAY BIT(7)
|
|
|
+#define GPMC_CONFIG4_OEEXTRADELAY BIT(7)
|
|
|
+#define GPMC_CONFIG4_WEEXTRADELAY BIT(23)
|
|
|
+#define GPMC_CONFIG6_CYCLE2CYCLEDIFFCSEN BIT(6)
|
|
|
+#define GPMC_CONFIG6_CYCLE2CYCLESAMECSEN BIT(7)
|
|
|
+
|
|
|
+#define GPMC_CS0_OFFSET 0x60
|
|
|
+#define GPMC_CS_SIZE 0x30
|
|
|
+#define GPMC_BCH_SIZE 0x10
|