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@@ -180,3 +180,138 @@ static struct plat_sci_port scif6_platform_data = {
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.flags = UPF_BOOT_AUTOCONF,
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.flags = UPF_BOOT_AUTOCONF,
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.scscr = SCSCR_RE | SCSCR_TE,
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.scscr = SCSCR_RE | SCSCR_TE,
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.scbrr_algo_id = SCBRR_ALGO_4,
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.scbrr_algo_id = SCBRR_ALGO_4,
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+ .type = PORT_SCIFB,
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+ .irqs = { evt2irq(0x0d60), evt2irq(0x0d60),
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+ evt2irq(0x0d60), evt2irq(0x0d60) },
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+};
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+
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+static struct platform_device scif6_device = {
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+ .name = "sh-sci",
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+ .id = 6,
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+ .dev = {
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+ .platform_data = &scif6_platform_data,
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+ },
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+};
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+
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+/* CMT */
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+static struct sh_timer_config cmt2_platform_data = {
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+ .name = "CMT2",
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+ .channel_offset = 0x40,
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+ .timer_bit = 5,
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+ .clockevent_rating = 125,
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+ .clocksource_rating = 125,
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+};
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+
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+static struct resource cmt2_resources[] = {
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+ [0] = {
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+ .name = "CMT2",
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+ .start = 0xe6130040,
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+ .end = 0xe613004b,
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+ .flags = IORESOURCE_MEM,
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+ },
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+ [1] = {
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+ .start = evt2irq(0x0b80), /* CMT2 */
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+ .flags = IORESOURCE_IRQ,
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+ },
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+};
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+
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+static struct platform_device cmt2_device = {
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+ .name = "sh_cmt",
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+ .id = 2,
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+ .dev = {
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+ .platform_data = &cmt2_platform_data,
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+ },
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+ .resource = cmt2_resources,
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+ .num_resources = ARRAY_SIZE(cmt2_resources),
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+};
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+
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+/* TMU */
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+static struct sh_timer_config tmu00_platform_data = {
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+ .name = "TMU00",
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+ .channel_offset = 0x4,
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+ .timer_bit = 0,
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+ .clockevent_rating = 200,
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+};
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+
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+static struct resource tmu00_resources[] = {
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+ [0] = {
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+ .name = "TMU00",
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+ .start = 0xfff60008,
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+ .end = 0xfff60013,
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+ .flags = IORESOURCE_MEM,
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+ },
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+ [1] = {
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+ .start = intcs_evt2irq(0xe80), /* TMU_TUNI0 */
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+ .flags = IORESOURCE_IRQ,
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+ },
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+};
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+
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+static struct platform_device tmu00_device = {
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+ .name = "sh_tmu",
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+ .id = 0,
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+ .dev = {
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+ .platform_data = &tmu00_platform_data,
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+ },
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+ .resource = tmu00_resources,
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+ .num_resources = ARRAY_SIZE(tmu00_resources),
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+};
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+
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+static struct sh_timer_config tmu01_platform_data = {
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+ .name = "TMU01",
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+ .channel_offset = 0x10,
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+ .timer_bit = 1,
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+ .clocksource_rating = 200,
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+};
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+
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+static struct resource tmu01_resources[] = {
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+ [0] = {
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+ .name = "TMU01",
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+ .start = 0xfff60014,
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+ .end = 0xfff6001f,
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+ .flags = IORESOURCE_MEM,
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+ },
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+ [1] = {
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+ .start = intcs_evt2irq(0xea0), /* TMU_TUNI1 */
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+ .flags = IORESOURCE_IRQ,
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+ },
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+};
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+
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+static struct platform_device tmu01_device = {
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+ .name = "sh_tmu",
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+ .id = 1,
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+ .dev = {
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+ .platform_data = &tmu01_platform_data,
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+ },
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+ .resource = tmu01_resources,
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+ .num_resources = ARRAY_SIZE(tmu01_resources),
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+};
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+
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+/* I2C */
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+static struct resource iic0_resources[] = {
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+ [0] = {
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+ .name = "IIC0",
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+ .start = 0xFFF20000,
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+ .end = 0xFFF20425 - 1,
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+ .flags = IORESOURCE_MEM,
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+ },
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+ [1] = {
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+ .start = intcs_evt2irq(0xe00), /* IIC0_ALI0 */
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+ .end = intcs_evt2irq(0xe60), /* IIC0_DTEI0 */
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+ .flags = IORESOURCE_IRQ,
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+ },
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+};
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+
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+static struct platform_device iic0_device = {
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+ .name = "i2c-sh_mobile",
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+ .id = 0, /* "i2c0" clock */
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+ .num_resources = ARRAY_SIZE(iic0_resources),
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+ .resource = iic0_resources,
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+};
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+
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+static struct resource iic1_resources[] = {
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+ [0] = {
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+ .name = "IIC1",
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+ .start = 0xE6C20000,
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+ .end = 0xE6C20425 - 1,
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+ .flags = IORESOURCE_MEM,
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+ },
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