|  | @@ -165,3 +165,145 @@ smp_callin(void)
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				|  |  |  
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				|  |  |  	DBGS(("smp_callin: commencing CPU %d current %p active_mm %p\n",
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				|  |  |  	      cpuid, current, current->active_mm));
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				|  |  | +
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				|  |  | +	preempt_disable();
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				|  |  | +	/* Do nothing.  */
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				|  |  | +	cpu_idle();
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				|  |  | +}
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				|  |  | +
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				|  |  | +/* Wait until hwrpb->txrdy is clear for cpu.  Return -1 on timeout.  */
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				|  |  | +static int
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				|  |  | +wait_for_txrdy (unsigned long cpumask)
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				|  |  | +{
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				|  |  | +	unsigned long timeout;
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				|  |  | +
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				|  |  | +	if (!(hwrpb->txrdy & cpumask))
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				|  |  | +		return 0;
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				|  |  | +
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				|  |  | +	timeout = jiffies + 10*HZ;
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				|  |  | +	while (time_before(jiffies, timeout)) {
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				|  |  | +		if (!(hwrpb->txrdy & cpumask))
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				|  |  | +			return 0;
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				|  |  | +		udelay(10);
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				|  |  | +		barrier();
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				|  |  | +	}
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				|  |  | +
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				|  |  | +	return -1;
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				|  |  | +}
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				|  |  | +
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				|  |  | +/*
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				|  |  | + * Send a message to a secondary's console.  "START" is one such
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				|  |  | + * interesting message.  ;-)
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				|  |  | + */
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				|  |  | +static void __cpuinit
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				|  |  | +send_secondary_console_msg(char *str, int cpuid)
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				|  |  | +{
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				|  |  | +	struct percpu_struct *cpu;
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				|  |  | +	register char *cp1, *cp2;
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				|  |  | +	unsigned long cpumask;
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				|  |  | +	size_t len;
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				|  |  | +
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				|  |  | +	cpu = (struct percpu_struct *)
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				|  |  | +		((char*)hwrpb
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				|  |  | +		 + hwrpb->processor_offset
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				|  |  | +		 + cpuid * hwrpb->processor_size);
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				|  |  | +
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				|  |  | +	cpumask = (1UL << cpuid);
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				|  |  | +	if (wait_for_txrdy(cpumask))
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				|  |  | +		goto timeout;
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				|  |  | +
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				|  |  | +	cp2 = str;
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				|  |  | +	len = strlen(cp2);
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				|  |  | +	*(unsigned int *)&cpu->ipc_buffer[0] = len;
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				|  |  | +	cp1 = (char *) &cpu->ipc_buffer[1];
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				|  |  | +	memcpy(cp1, cp2, len);
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				|  |  | +
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				|  |  | +	/* atomic test and set */
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				|  |  | +	wmb();
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				|  |  | +	set_bit(cpuid, &hwrpb->rxrdy);
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				|  |  | +
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				|  |  | +	if (wait_for_txrdy(cpumask))
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				|  |  | +		goto timeout;
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				|  |  | +	return;
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				|  |  | +
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				|  |  | + timeout:
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				|  |  | +	printk("Processor %x not ready\n", cpuid);
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				|  |  | +}
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				|  |  | +
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				|  |  | +/*
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				|  |  | + * A secondary console wants to send a message.  Receive it.
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				|  |  | + */
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				|  |  | +static void
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				|  |  | +recv_secondary_console_msg(void)
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				|  |  | +{
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				|  |  | +	int mycpu, i, cnt;
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				|  |  | +	unsigned long txrdy = hwrpb->txrdy;
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				|  |  | +	char *cp1, *cp2, buf[80];
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				|  |  | +	struct percpu_struct *cpu;
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				|  |  | +
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				|  |  | +	DBGS(("recv_secondary_console_msg: TXRDY 0x%lx.\n", txrdy));
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				|  |  | +
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				|  |  | +	mycpu = hard_smp_processor_id();
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				|  |  | +
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				|  |  | +	for (i = 0; i < NR_CPUS; i++) {
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				|  |  | +		if (!(txrdy & (1UL << i)))
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				|  |  | +			continue;
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				|  |  | +
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				|  |  | +		DBGS(("recv_secondary_console_msg: "
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				|  |  | +		      "TXRDY contains CPU %d.\n", i));
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				|  |  | +
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				|  |  | +		cpu = (struct percpu_struct *)
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				|  |  | +		  ((char*)hwrpb
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				|  |  | +		   + hwrpb->processor_offset
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				|  |  | +		   + i * hwrpb->processor_size);
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				|  |  | +
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				|  |  | + 		DBGS(("recv_secondary_console_msg: on %d from %d"
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				|  |  | +		      " HALT_REASON 0x%lx FLAGS 0x%lx\n",
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				|  |  | +		      mycpu, i, cpu->halt_reason, cpu->flags));
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				|  |  | +
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				|  |  | +		cnt = cpu->ipc_buffer[0] >> 32;
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				|  |  | +		if (cnt <= 0 || cnt >= 80)
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				|  |  | +			strcpy(buf, "<<< BOGUS MSG >>>");
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				|  |  | +		else {
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				|  |  | +			cp1 = (char *) &cpu->ipc_buffer[11];
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				|  |  | +			cp2 = buf;
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				|  |  | +			strcpy(cp2, cp1);
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				|  |  | +			
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				|  |  | +			while ((cp2 = strchr(cp2, '\r')) != 0) {
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				|  |  | +				*cp2 = ' ';
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				|  |  | +				if (cp2[1] == '\n')
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				|  |  | +					cp2[1] = ' ';
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				|  |  | +			}
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				|  |  | +		}
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				|  |  | +
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				|  |  | +		DBGS((KERN_INFO "recv_secondary_console_msg: on %d "
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				|  |  | +		      "message is '%s'\n", mycpu, buf));
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				|  |  | +	}
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				|  |  | +
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				|  |  | +	hwrpb->txrdy = 0;
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				|  |  | +}
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				|  |  | +
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				|  |  | +/*
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				|  |  | + * Convince the console to have a secondary cpu begin execution.
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				|  |  | + */
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				|  |  | +static int __cpuinit
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				|  |  | +secondary_cpu_start(int cpuid, struct task_struct *idle)
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				|  |  | +{
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				|  |  | +	struct percpu_struct *cpu;
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				|  |  | +	struct pcb_struct *hwpcb, *ipcb;
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				|  |  | +	unsigned long timeout;
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				|  |  | +	  
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				|  |  | +	cpu = (struct percpu_struct *)
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				|  |  | +		((char*)hwrpb
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				|  |  | +		 + hwrpb->processor_offset
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				|  |  | +		 + cpuid * hwrpb->processor_size);
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				|  |  | +	hwpcb = (struct pcb_struct *) cpu->hwpcb;
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				|  |  | +	ipcb = &task_thread_info(idle)->pcb;
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				|  |  | +
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				|  |  | +	/* Initialize the CPU's HWPCB to something just good enough for
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				|  |  | +	   us to get started.  Immediately after starting, we'll swpctx
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				|  |  | +	   to the target idle task's pcb.  Reuse the stack in the mean
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				|  |  | +	   time.  Precalculate the target PCBB.  */
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				|  |  | +	hwpcb->ksp = (unsigned long)ipcb + sizeof(union thread_union) - 16;
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				|  |  | +	hwpcb->usp = 0;
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				|  |  | +	hwpcb->ptbr = ipcb->ptbr;
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