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@@ -562,3 +562,186 @@
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#define OMAP4430_CLKSEL_AESS_FCLK_SHIFT 24
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#define OMAP4430_CLKSEL_AESS_FCLK_WIDTH 0x1
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#define OMAP4430_CLKSEL_AESS_FCLK_MASK (1 << 24)
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+
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+/* Used by CM_CLKSEL_CORE */
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+#define OMAP4430_CLKSEL_CORE_SHIFT 0
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+#define OMAP4430_CLKSEL_CORE_WIDTH 0x1
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+#define OMAP4430_CLKSEL_CORE_MASK (1 << 0)
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+
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+/* Renamed from CLKSEL_CORE Used by CM_SHADOW_FREQ_CONFIG2 */
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+#define OMAP4430_CLKSEL_CORE_1_1_SHIFT 1
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+#define OMAP4430_CLKSEL_CORE_1_1_WIDTH 0x1
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+#define OMAP4430_CLKSEL_CORE_1_1_MASK (1 << 1)
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+
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+/* Used by CM_WKUP_USIM_CLKCTRL */
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+#define OMAP4430_CLKSEL_DIV_SHIFT 24
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+#define OMAP4430_CLKSEL_DIV_WIDTH 0x1
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+#define OMAP4430_CLKSEL_DIV_MASK (1 << 24)
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+
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+/* Used by CM_MPU_MPU_CLKCTRL */
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+#define OMAP4460_CLKSEL_EMIF_DIV_MODE_SHIFT 24
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+#define OMAP4460_CLKSEL_EMIF_DIV_MODE_WIDTH 0x1
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+#define OMAP4460_CLKSEL_EMIF_DIV_MODE_MASK (1 << 24)
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+
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+/* Used by CM_CAM_FDIF_CLKCTRL */
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+#define OMAP4430_CLKSEL_FCLK_SHIFT 24
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+#define OMAP4430_CLKSEL_FCLK_WIDTH 0x2
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+#define OMAP4430_CLKSEL_FCLK_MASK (0x3 << 24)
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+
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+/* Used by CM_L4PER_MCBSP4_CLKCTRL */
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+#define OMAP4430_CLKSEL_INTERNAL_SOURCE_SHIFT 25
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+#define OMAP4430_CLKSEL_INTERNAL_SOURCE_WIDTH 0x1
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+#define OMAP4430_CLKSEL_INTERNAL_SOURCE_MASK (1 << 25)
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+
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+/*
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+ * Renamed from CLKSEL_INTERNAL_SOURCE Used by CM1_ABE_DMIC_CLKCTRL,
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+ * CM1_ABE_MCASP_CLKCTRL, CM1_ABE_MCBSP1_CLKCTRL, CM1_ABE_MCBSP2_CLKCTRL,
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+ * CM1_ABE_MCBSP3_CLKCTRL
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+ */
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+#define OMAP4430_CLKSEL_INTERNAL_SOURCE_CM1_ABE_DMIC_SHIFT 26
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+#define OMAP4430_CLKSEL_INTERNAL_SOURCE_CM1_ABE_DMIC_WIDTH 0x2
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+#define OMAP4430_CLKSEL_INTERNAL_SOURCE_CM1_ABE_DMIC_MASK (0x3 << 26)
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+
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+/* Used by CM_CLKSEL_CORE */
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+#define OMAP4430_CLKSEL_L3_SHIFT 4
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+#define OMAP4430_CLKSEL_L3_WIDTH 0x1
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+#define OMAP4430_CLKSEL_L3_MASK (1 << 4)
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+
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+/* Renamed from CLKSEL_L3 Used by CM_SHADOW_FREQ_CONFIG2 */
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+#define OMAP4430_CLKSEL_L3_SHADOW_SHIFT 2
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+#define OMAP4430_CLKSEL_L3_SHADOW_WIDTH 0x1
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+#define OMAP4430_CLKSEL_L3_SHADOW_MASK (1 << 2)
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+
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+/* Used by CM_CLKSEL_CORE */
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+#define OMAP4430_CLKSEL_L4_SHIFT 8
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+#define OMAP4430_CLKSEL_L4_WIDTH 0x1
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+#define OMAP4430_CLKSEL_L4_MASK (1 << 8)
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+
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+/* Used by CM_CLKSEL_ABE */
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+#define OMAP4430_CLKSEL_OPP_SHIFT 0
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+#define OMAP4430_CLKSEL_OPP_WIDTH 0x2
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+#define OMAP4430_CLKSEL_OPP_MASK (0x3 << 0)
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+
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+/* Used by CM_EMU_DEBUGSS_CLKCTRL */
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+#define OMAP4430_CLKSEL_PMD_STM_CLK_SHIFT 27
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+#define OMAP4430_CLKSEL_PMD_STM_CLK_WIDTH 0x3
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+#define OMAP4430_CLKSEL_PMD_STM_CLK_MASK (0x7 << 27)
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+
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+/* Used by CM_EMU_DEBUGSS_CLKCTRL */
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+#define OMAP4430_CLKSEL_PMD_TRACE_CLK_SHIFT 24
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+#define OMAP4430_CLKSEL_PMD_TRACE_CLK_WIDTH 0x3
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+#define OMAP4430_CLKSEL_PMD_TRACE_CLK_MASK (0x7 << 24)
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+
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+/* Used by CM_GFX_GFX_CLKCTRL */
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+#define OMAP4430_CLKSEL_SGX_FCLK_SHIFT 24
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+#define OMAP4430_CLKSEL_SGX_FCLK_WIDTH 0x1
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+#define OMAP4430_CLKSEL_SGX_FCLK_MASK (1 << 24)
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+
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+/*
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+ * Used by CM1_ABE_DMIC_CLKCTRL, CM1_ABE_MCASP_CLKCTRL, CM1_ABE_MCBSP1_CLKCTRL,
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+ * CM1_ABE_MCBSP2_CLKCTRL, CM1_ABE_MCBSP3_CLKCTRL
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+ */
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+#define OMAP4430_CLKSEL_SOURCE_SHIFT 24
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+#define OMAP4430_CLKSEL_SOURCE_WIDTH 0x2
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+#define OMAP4430_CLKSEL_SOURCE_MASK (0x3 << 24)
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+
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+/* Renamed from CLKSEL_SOURCE Used by CM_L4PER_MCBSP4_CLKCTRL */
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+#define OMAP4430_CLKSEL_SOURCE_24_24_SHIFT 24
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+#define OMAP4430_CLKSEL_SOURCE_24_24_WIDTH 0x1
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+#define OMAP4430_CLKSEL_SOURCE_24_24_MASK (1 << 24)
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+
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+/* Used by CM_L3INIT_USB_HOST_CLKCTRL */
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+#define OMAP4430_CLKSEL_UTMI_P1_SHIFT 24
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+#define OMAP4430_CLKSEL_UTMI_P1_WIDTH 0x1
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+#define OMAP4430_CLKSEL_UTMI_P1_MASK (1 << 24)
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+
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+/* Used by CM_L3INIT_USB_HOST_CLKCTRL */
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+#define OMAP4430_CLKSEL_UTMI_P2_SHIFT 25
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+#define OMAP4430_CLKSEL_UTMI_P2_WIDTH 0x1
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+#define OMAP4430_CLKSEL_UTMI_P2_MASK (1 << 25)
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+
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+/*
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+ * Used by CM1_ABE_CLKSTCTRL, CM_ALWON_CLKSTCTRL, CM_CAM_CLKSTCTRL,
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+ * CM_CEFUSE_CLKSTCTRL, CM_D2D_CLKSTCTRL, CM_DSS_CLKSTCTRL,
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+ * CM_DUCATI_CLKSTCTRL, CM_EMU_CLKSTCTRL, CM_GFX_CLKSTCTRL, CM_IVAHD_CLKSTCTRL,
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+ * CM_L3INIT_CLKSTCTRL, CM_L3INSTR_CLKSTCTRL, CM_L3_1_CLKSTCTRL,
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+ * CM_L3_2_CLKSTCTRL, CM_L4CFG_CLKSTCTRL, CM_L4PER_CLKSTCTRL,
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+ * CM_L4SEC_CLKSTCTRL, CM_MEMIF_CLKSTCTRL, CM_MPU_CLKSTCTRL, CM_SDMA_CLKSTCTRL,
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+ * CM_TESLA_CLKSTCTRL, CM_WKUP_CLKSTCTRL
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+ */
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+#define OMAP4430_CLKTRCTRL_SHIFT 0
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+#define OMAP4430_CLKTRCTRL_WIDTH 0x2
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+#define OMAP4430_CLKTRCTRL_MASK (0x3 << 0)
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+
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+/* Used by CM_EMU_OVERRIDE_DPLL_CORE */
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+#define OMAP4430_CORE_DPLL_EMU_DIV_SHIFT 0
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+#define OMAP4430_CORE_DPLL_EMU_DIV_WIDTH 0x7
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+#define OMAP4430_CORE_DPLL_EMU_DIV_MASK (0x7f << 0)
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+
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+/* Used by CM_EMU_OVERRIDE_DPLL_CORE */
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+#define OMAP4430_CORE_DPLL_EMU_MULT_SHIFT 8
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+#define OMAP4430_CORE_DPLL_EMU_MULT_WIDTH 0xb
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+#define OMAP4430_CORE_DPLL_EMU_MULT_MASK (0x7ff << 8)
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+
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+/* Used by REVISION_CM1, REVISION_CM2 */
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+#define OMAP4430_CUSTOM_SHIFT 6
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+#define OMAP4430_CUSTOM_WIDTH 0x2
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+#define OMAP4430_CUSTOM_MASK (0x3 << 6)
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+
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+/* Used by CM_L3_2_DYNAMICDEP, CM_L4CFG_DYNAMICDEP */
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+#define OMAP4430_D2D_DYNDEP_SHIFT 18
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+#define OMAP4430_D2D_DYNDEP_WIDTH 0x1
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+#define OMAP4430_D2D_DYNDEP_MASK (1 << 18)
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+
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+/* Used by CM_MPU_STATICDEP */
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+#define OMAP4430_D2D_STATDEP_SHIFT 18
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+#define OMAP4430_D2D_STATDEP_WIDTH 0x1
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+#define OMAP4430_D2D_STATDEP_MASK (1 << 18)
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+
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+/* Used by CM_CLKSEL_DPLL_MPU */
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+#define OMAP4460_DCC_COUNT_MAX_SHIFT 24
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+#define OMAP4460_DCC_COUNT_MAX_WIDTH 0x8
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+#define OMAP4460_DCC_COUNT_MAX_MASK (0xff << 24)
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+
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+/* Used by CM_CLKSEL_DPLL_MPU */
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+#define OMAP4460_DCC_EN_SHIFT 22
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+#define OMAP4460_DCC_EN_MASK (1 << 22)
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+
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+/*
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+ * Used by CM_SSC_DELTAMSTEP_DPLL_ABE, CM_SSC_DELTAMSTEP_DPLL_CORE,
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+ * CM_SSC_DELTAMSTEP_DPLL_DDRPHY, CM_SSC_DELTAMSTEP_DPLL_IVA,
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+ * CM_SSC_DELTAMSTEP_DPLL_MPU, CM_SSC_DELTAMSTEP_DPLL_PER,
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+ * CM_SSC_DELTAMSTEP_DPLL_UNIPRO, CM_SSC_DELTAMSTEP_DPLL_USB
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+ */
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+#define OMAP4430_DELTAMSTEP_SHIFT 0
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+#define OMAP4430_DELTAMSTEP_WIDTH 0x14
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+#define OMAP4430_DELTAMSTEP_MASK (0xfffff << 0)
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+
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+/* Renamed from DELTAMSTEP Used by CM_SSC_DELTAMSTEP_DPLL_USB */
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+#define OMAP4460_DELTAMSTEP_0_20_SHIFT 0
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+#define OMAP4460_DELTAMSTEP_0_20_WIDTH 0x15
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+#define OMAP4460_DELTAMSTEP_0_20_MASK (0x1fffff << 0)
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+
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+/* Used by CM_DLL_CTRL */
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+#define OMAP4430_DLL_OVERRIDE_SHIFT 0
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+#define OMAP4430_DLL_OVERRIDE_WIDTH 0x1
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+#define OMAP4430_DLL_OVERRIDE_MASK (1 << 0)
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+
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+/* Renamed from DLL_OVERRIDE Used by CM_SHADOW_FREQ_CONFIG1 */
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+#define OMAP4430_DLL_OVERRIDE_2_2_SHIFT 2
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+#define OMAP4430_DLL_OVERRIDE_2_2_WIDTH 0x1
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+#define OMAP4430_DLL_OVERRIDE_2_2_MASK (1 << 2)
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+
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+/* Used by CM_SHADOW_FREQ_CONFIG1 */
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+#define OMAP4430_DLL_RESET_SHIFT 3
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+#define OMAP4430_DLL_RESET_WIDTH 0x1
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+#define OMAP4430_DLL_RESET_MASK (1 << 3)
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+
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+/*
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+ * Used by CM_CLKSEL_DPLL_ABE, CM_CLKSEL_DPLL_CORE, CM_CLKSEL_DPLL_DDRPHY,
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+ * CM_CLKSEL_DPLL_IVA, CM_CLKSEL_DPLL_MPU, CM_CLKSEL_DPLL_PER,
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+ * CM_CLKSEL_DPLL_UNIPRO, CM_CLKSEL_DPLL_USB
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+ */
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+#define OMAP4430_DPLL_BYP_CLKSEL_SHIFT 23
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+#define OMAP4430_DPLL_BYP_CLKSEL_WIDTH 0x1
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+#define OMAP4430_DPLL_BYP_CLKSEL_MASK (1 << 23)
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